<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
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<updated>2023-10-09T21:00:09Z</updated>
<entry>
<title>drm/amd/display: Refactor HWSS into component folder</title>
<updated>2023-10-09T21:00:09Z</updated>
<author>
<name>Mounika Adhuri</name>
<email>moadhuri@amd.com</email>
</author>
<published>2023-09-22T12:53:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e53524cdcc02d089e757b668da031ba06ff665c3'/>
<id>urn:sha1:e53524cdcc02d089e757b668da031ba06ff665c3</id>
<content type='text'>
[why]
Rename hw_sequencer to hwseq.
Move all hwseq files to unique
folder hwss.

[how]
creating hwss repo in dc, and moved the dcnxx_hwseq.c
and .h files into corresponding new folders inside the hwss
and cleared the linkage errors by adding relative paths
in the Makefile.template.

Reviewed-by: Martin Leung &lt;martin.leung@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Mounika Adhuri &lt;moadhuri@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Adjust code style for hw_sequencer.h</title>
<updated>2023-10-04T22:42:41Z</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2023-09-25T21:07:33Z</published>
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<id>urn:sha1:13c0e836316a03ab859f616b85cfe25c3d69d5db</id>
<content type='text'>
[Why&amp;How]
* Rearrange some definitions for consistency
* Drop legacy code

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix incorrect odm change detection logic</title>
<updated>2023-09-26T21:00:22Z</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2023-09-14T16:42:50Z</published>
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<id>urn:sha1:d849434977a8a5926c449c761fa9869071091f6a</id>
<content type='text'>
[why]
The current ODM change detection only compares first two ODM slices.
If there are 4 ODM slices and the change is within the last two slices, the
logic fails to detect ODM change and cause us to skip ODM programming
unexpectedly.

[how]
Add a is ODM topology changed resource interface to check any ODM
topology changes with a more generic method.

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: switch DC over to the new DRM logging macros</title>
<updated>2023-09-26T21:00:21Z</updated>
<author>
<name>Hamza Mahfooz</name>
<email>hamza.mahfooz@amd.com</email>
</author>
<published>2023-09-20T17:38:11Z</published>
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<id>urn:sha1:5d72e247e58c966f4e50cffebf0d414de7fc90ed</id>
<content type='text'>
For multi-GPU systems it is difficult to tell which GPU a particular
message is being printed for and that is undesirable because it
complicates debugging efforts. Also, the new macros allow us to enable
logging for particular parts of the codebase more selectively (since we
no longer need to throw everything at DRM_DEBUG_KMS()). So, for the
reasons outlined above we should switch to the new macros.

We can accomplish this by using the existing DC_LOGGER code to pass
around the relevant `struct drm_device` which will be fed to the new
macros in logger_types.h. Also, we must get rid of all instances of the
DC_LOG_.*() functions that are currently in amdgpu_dm since we don't use
the DC logger there and we can simply refer to the macros directly
there instead.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix DP2.0 timing sync</title>
<updated>2023-09-26T21:00:21Z</updated>
<author>
<name>Ilya Bakoulin</name>
<email>ilya.bakoulin@amd.com</email>
</author>
<published>2023-09-07T18:03:15Z</published>
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<id>urn:sha1:ce74bece80a914deb118bb0a0511a16ad344ffd2</id>
<content type='text'>
[Why]
Triggering OTG sync before all OTG/HPO clock programming is complete
causes timing sync to fail and a subsequent P-state hang.

[How]
Move DTB clock programming earlier in the sequence to
enable_stream_timing.

Reviewed-by: Ariel Bernstein &lt;eric.bernstein@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;ilya.bakoulin@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix some style issues</title>
<updated>2023-09-26T20:54:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-09-20T13:35:32Z</published>
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<id>urn:sha1:cac9f51d73ba4fa619af0bdc14229cc03b722270</id>
<content type='text'>
Fixes a few style issues:
- Only calculate the dto_params and dp_hpo_inst when dccg is present.
- Fix indentation
- Drop empty else block

Fixes: 7f7925e25828 ("drm/amd/display: Fix MST recognizes connected displays as one")
Cc: Muhammad Ahmed &lt;ahmed.ahmed@amd.com&gt;
Cc: Michel Dänzer &lt;michel@daenzer.net&gt;
Cc: Stylon Wang &lt;stylon.wang@amd.com&gt;
Reviewed-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix MST recognizes connected displays as one</title>
<updated>2023-09-11T21:18:05Z</updated>
<author>
<name>Muhammad Ahmed</name>
<email>ahmed.ahmed@amd.com</email>
</author>
<published>2023-08-23T23:25:25Z</published>
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<id>urn:sha1:7f7925e258288cfcfa2b0e0631fcd91a39744f94</id>
<content type='text'>
[What]
MST now recognizes both connected displays

Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Muhammad Ahmed &lt;ahmed.ahmed@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: dc cleanup for tests</title>
<updated>2023-09-11T21:17:37Z</updated>
<author>
<name>Sridevi Arvindekar</name>
<email>Sridevi.Arvindekar@amd.com</email>
</author>
<published>2023-08-24T23:20:30Z</published>
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<id>urn:sha1:9aa75e3baadb9b02fb81c18dc7c361c54aad57b6</id>
<content type='text'>
[WHY&amp;HOW]
Code cleanup found in internal tests

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Sridevi Arvindekar &lt;Sridevi.Arvindekar@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Blank phantom OTG before enabling</title>
<updated>2023-09-11T21:11:19Z</updated>
<author>
<name>Alvin Lee</name>
<email>Alvin.Lee2@amd.com</email>
</author>
<published>2023-08-08T17:21:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e87a6c5b7780b5f423797351eb586ed96cc6d151'/>
<id>urn:sha1:e87a6c5b7780b5f423797351eb586ed96cc6d151</id>
<content type='text'>
[Description]
Before enabling the phantom OTG for an update we
must enable DPG to avoid underflow.

Reviewed-by: Samson Tam &lt;samson.tam@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update DCN20 for DCN35 support</title>
<updated>2023-08-30T19:51:13Z</updated>
<author>
<name>Qingqing Zhuo</name>
<email>Qingqing.Zhuo@amd.com</email>
</author>
<published>2023-08-03T04:55:47Z</published>
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<id>urn:sha1:9fc64eade85dbb1e92944ad07b14c4c24d8c08dc</id>
<content type='text'>
[Why &amp; How]
Update DCN20 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo &lt;Qingqing.Zhuo@amd.com&gt;
Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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