<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/dc/resource, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-04-07T10:36:31Z</updated>
<entry>
<title>Merge v7.0-rc7 into drm-next</title>
<updated>2026-04-07T10:36:31Z</updated>
<author>
<name>Simona Vetter</name>
<email>simona.vetter@ffwll.ch</email>
</author>
<published>2026-04-07T10:27:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=322e4116ac8d48255f9599250347f48e56ce8979'/>
<id>urn:sha1:322e4116ac8d48255f9599250347f48e56ce8979</id>
<content type='text'>
Thomas Zimmermann needs 2f42c1a61616 ("drm/ast: dp501: Fix
initialization of SCU2C") for drm-misc-next.

Conflicts:
- drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

Just between e927b36ae18b ("drm/amd/display: Fix NULL pointer
dereference in dcn401_init_hw()") and it's cherry-pick that confused
git.

- drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

Deleted in 6b0a6116286e ("drm/amd/pm: Unify version check in SMUv11")
but some cherry-picks confused git. Same for v12/v14.

Signed-off-by: Simona Vetter &lt;simona.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Wire up dcn10_dio_construct() for all pre-DCN401 generations</title>
<updated>2026-04-02T19:24:13Z</updated>
<author>
<name>Ionut Nechita</name>
<email>ionut_n2001@yahoo.com</email>
</author>
<published>2026-03-23T21:13:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a4983968fa5b3179ab090407d325a71cdc96874e'/>
<id>urn:sha1:a4983968fa5b3179ab090407d325a71cdc96874e</id>
<content type='text'>
Description:
 - Commit b82f0759346617b2 ("drm/amd/display: Migrate DIO registers access
   from hwseq to dio component") moved DIO_MEM_PWR_CTRL register access
   behind the new dio abstraction layer but only created the dio object for
   DCN 4.01. On all other generations (DCN 10/20/21/201/30/301/302/303/
   31/314/315/316/32/321/35/351/36), the dio pointer is NULL, causing the
   register write to be silently skipped.

   This results in AFMT HDMI memory not being powered on during init_hw,
   which can cause HDMI audio failures and display issues on affected
   hardware including Renoir/Cezanne (DCN 2.1) APUs that use dcn10_init_hw.

   Call dcn10_dio_construct() in each older DCN generation's resource.c
   to create the dio object, following the same pattern as DCN 4.01. This
   ensures the dio pointer is non-NULL and the mem_pwr_ctrl callback works
   through the dio abstraction for all DCN generations.

Fixes: b82f07593466 ("drm/amd/display: Migrate DIO registers access from hwseq to dio component.")
Reviewed-by: Ivan Lipski &lt;ivan.lipski@amd.com&gt;
Signed-off-by: Ionut Nechita &lt;ionut_n2001@yahoo.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fixed Silence complier warnings in dc</title>
<updated>2026-03-30T19:12:15Z</updated>
<author>
<name>Gaghik Khachatrian</name>
<email>gaghik.khachatrian@amd.com</email>
</author>
<published>2026-03-09T21:18:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f82480fafedf622541276d48a3b4fed20ce5d866'/>
<id>urn:sha1:f82480fafedf622541276d48a3b4fed20ce5d866</id>
<content type='text'>
[Why]
Resolve compiler warnings by marking unused parameters explicitly.

[How]
In .c and .h function definitions, keep parameter names
in signatures and add a line with `(void)param;` in function body

Preserved function signatures and avoids breaking code paths that
may reference the parameter under conditional compilation.

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Reviewed-by: Austin Zheng &lt;austin.zheng@amd.com&gt;
Signed-off-by: Gaghik Khachatrian &lt;gaghik.khachatrian@amd.com&gt;
Signed-off-by: Chuanyu Tseng &lt;chuanyu.tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move FPU Guards From DML To DC - Part 1</title>
<updated>2026-03-30T19:06:10Z</updated>
<author>
<name>Rafal Ostrowski</name>
<email>rafal.ostrowski@amd.com</email>
</author>
<published>2026-02-24T14:36:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3539437f354bd24c98928a80d4db3a23fa2a7b19'/>
<id>urn:sha1:3539437f354bd24c98928a80d4db3a23fa2a7b19</id>
<content type='text'>
[Why]
FPU guards (DC_FP_START/DC_FP_END) are required to wrap around code that
can manipulates floats. To do this properly, the FPU guards must be used
in a file that is not compiled as a FPU unit. If the guards are used in
a file that is a FPU unit, other sections in the file that aren't guarded
may be end up being compiled to use FPU operations.

[How]
Added DC_FP_START and DC_FP_END to DC functions that call DML functions
using FPU.

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Rafal Ostrowski &lt;rafal.ostrowski@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: correct unknown plane state patch</title>
<updated>2026-03-30T19:01:57Z</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2026-03-19T22:23:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7b82e92da0d4fd686901edd9f649c51fcbcb9894'/>
<id>urn:sha1:7b82e92da0d4fd686901edd9f649c51fcbcb9894</id>
<content type='text'>
[why]
dcn42x is using same gfx as dcn35, i.e. not use gfx_address3.

Reviewed-by: Ovidiu Bunea &lt;ovidiu.bunea@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Signed-off-by: Chuanyu Tseng &lt;chuanyu.tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: Rework YCbCr422 DSC policy"</title>
<updated>2026-03-30T18:56:26Z</updated>
<author>
<name>Relja Vojvodic</name>
<email>Relja.Vojvodic@amd.com</email>
</author>
<published>2026-03-17T20:47:07Z</published>
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<id>urn:sha1:246808e7922056594311ad6ca11d31d2d8c27b01</id>
<content type='text'>
Revert commit 19b79e4f2182 ("drm/amd/display: Rework YCbCr422 DSC policy")

Reason for Revert:
This commit is causing compliance failures

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Relja Vojvodic &lt;Relja.Vojvodic@amd.com&gt;
Signed-off-by: Chuanyu Tseng &lt;chuanyu.tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/dc: Disable PSR &amp; Replay CRTC disable by default</title>
<updated>2026-03-30T18:56:20Z</updated>
<author>
<name>Ovidiu Bunea</name>
<email>ovidiu.bunea@amd.com</email>
</author>
<published>2026-03-18T13:23:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4d55784b9153f9463fed0be011b61d3e4265a4e4'/>
<id>urn:sha1:4d55784b9153f9463fed0be011b61d3e4265a4e4</id>
<content type='text'>
[why &amp; how]
Let IPS FSM handle OTG disable.

Reviewed-by: Leo Chen &lt;leo.chen@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Ovidiu Bunea &lt;ovidiu.bunea@amd.com&gt;
Signed-off-by: Chuanyu Tseng &lt;chuanyu.tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix Silence signed/unsighed mismatch warning in dc</title>
<updated>2026-03-30T18:55:17Z</updated>
<author>
<name>Gaghik Khachatrian</name>
<email>gaghik.khachatrian@amd.com</email>
</author>
<published>2026-03-12T19:42:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=26ebcac0566b78a9e6bfb71fb6b3436e0fe251a6'/>
<id>urn:sha1:26ebcac0566b78a9e6bfb71fb6b3436e0fe251a6</id>
<content type='text'>
[Why]
Implicit signed-to-unsigned conversions caused compiler
warnings in DC paths.

[How]
Added explicit (unsigned int)/(uint32_t) casts for sentinel -1
assignments and IRQ ~MASK initializers, with small cast alignment
in logging/DPCD code.

Functionality and behavior is unchanged; only type intent is explicit.

Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Gaghik Khachatrian &lt;gaghik.khachatrian@amd.com&gt;
Signed-off-by: Chuanyu Tseng &lt;chuanyu.tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Don't set 4to1MPC config dynamically</title>
<updated>2026-03-30T18:52:56Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2026-01-16T16:47:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4c3aeb11d504b68c63a1caeecf5517385e6e7bdb'/>
<id>urn:sha1:4c3aeb11d504b68c63a1caeecf5517385e6e7bdb</id>
<content type='text'>
We were previously modifying the global dc-&gt;config.enable_4to1MPC
dynamically. These variables are meant as global configs, not to
by dynamically modified. Modifying them dynamically prevents us
from enabling/disabling functionality for debug purposes and can
easily lead to bad things since we're not operating on the current
state but on DC-wide variables.

Instead we should look at the existing split4mpc decision in
dcn20_validate_apply_split_flags and make the decision there,
if the global config.enable_4to1MPC is set to true for the
DCN version we're running.

This fixes corruption that is observed when running a new IGT
kms_colorop test for color-space-conversion that uses a
YUV plane and outputs to a writeback connector.

Co-developed by Claude Sonnet 4.5.

Assisted-by: Claude:claude-sonnet-4.5
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Chuanyu Tseng &lt;chuanyu.tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Merge pipes for validate</title>
<updated>2026-03-30T18:44:24Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2026-01-16T16:48:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=606f6b171326152ef08d0ef0ad49f52034edca07'/>
<id>urn:sha1:606f6b171326152ef08d0ef0ad49f52034edca07</id>
<content type='text'>
Validation expects to operate on non-split pipes. This is
seen in dcn20_fast_validate_bw, which merges pipes for
validation. We weren't doing that in the non-fast path
which lead to validation failures when operating with
4-to-1 MPC and a writeback connector.

Co-developed by Claude Sonnet 4.5

Assisted-by: Claude:claude-sonnet-4.5
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Chuanyu Tseng &lt;chuanyu.tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
