<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h, branch v7.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v7.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v7.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2025-10-28T14:08:36Z</updated>
<entry>
<title>drm/amd/display: Get maximum pixel clock from VBIOS</title>
<updated>2025-10-28T14:08:36Z</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2025-09-26T18:01:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=727b179a8032c256b02b816661b2d96713f11e41'/>
<id>urn:sha1:727b179a8032c256b02b816661b2d96713f11e41</id>
<content type='text'>
We will use this for validating the pixel clock when
an analog monitor is connected to VGA or DVI-I connectors.

For reference, see the legacy display code:
amdgpu_connector_vga_mode_valid

Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fixing typo in macro name</title>
<updated>2025-05-22T16:01:57Z</updated>
<author>
<name>Jihed Chaibi</name>
<email>jihed.chaibi.dev@gmail.com</email>
</author>
<published>2025-05-17T03:06:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ae6f4ab96be19395b8977f65670ae60d01096a83'/>
<id>urn:sha1:ae6f4ab96be19395b8977f65670ae60d01096a83</id>
<content type='text'>
"ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS

PS: checkpatch.pl is complaining about the presence of a space at the
start of drivers/gpu/drm/amd/include/atomfirmware.h line: 1716
This is propably because this file uses (two) spaces and not tabs.

Signed-off-by: Jihed Chaibi &lt;jihed.chaibi.dev@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: get dprefclk ss info from integration info table</title>
<updated>2023-12-19T20:22:59Z</updated>
<author>
<name>Charlene Liu</name>
<email>charlene.liu@amd.com</email>
</author>
<published>2023-12-06T22:14:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=51e7b64690776a9981355428b537af9048308a95'/>
<id>urn:sha1:51e7b64690776a9981355428b537af9048308a95</id>
<content type='text'>
[why &amp; how]
we have two SSC_En:
we get ssc_info from dce_info for MPLL_SSC_EN.
we used to call VBIOS cmdtbl's smu_info's SS persentage for DPRECLK SS info,
is used for DP AUDIO and VBIOS' smu_info table was from systemIntegrationInfoTable.

since dcn35 VBIOS removed smu_info, driver need to use integrationInfotable directly.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: cleaning up smu_if to add future flexibility</title>
<updated>2022-03-15T18:25:15Z</updated>
<author>
<name>Leung, Martin</name>
<email>Martin.Leung@amd.com</email>
</author>
<published>2022-02-21T02:44:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4984e3aae6fa4f42fc24f2745b74509bf2cb0b03'/>
<id>urn:sha1:4984e3aae6fa4f42fc24f2745b74509bf2cb0b03</id>
<content type='text'>
why and how:
need to hook in new smu interfaces
cleaning up code that used old variables

Reviewed-by: Nevenko Stupar &lt;Nevenko.Stupar@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Leung, Martin &lt;Martin.Leung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Implement fixed DP drive settings</title>
<updated>2021-10-28T18:26:15Z</updated>
<author>
<name>George Shen</name>
<email>george.shen@amd.com</email>
</author>
<published>2021-10-06T19:47:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=54fe00be270dd6fdb9e23c31a4497edec5a3609b'/>
<id>urn:sha1:54fe00be270dd6fdb9e23c31a4497edec5a3609b</id>
<content type='text'>
[Why]
Currently there are use cases that require DP link to maintain fixed VS
and PE in HW regardless of what the sink requests. BIOS integrated info
table will specify whether we need to use the fixed drive settings, and
the drive settings to use.

[How]
Implement changes to parse the integrated info table and set the fixed
drive settings accordingly.

Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Acked-by: Agustin Gutierrez &lt;agustin.gutierrez@amd.com&gt;
Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)</title>
<updated>2020-11-04T22:11:37Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-11-02T20:37:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=20f2ffe504728612d7b0c34e4f8280e34251e704'/>
<id>urn:sha1:20f2ffe504728612d7b0c34e4f8280e34251e704</id>
<content type='text'>
Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt; (v1)
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add dcn3.01 support to DC (v2)</title>
<updated>2020-10-05T19:15:56Z</updated>
<author>
<name>Roman Li</name>
<email>Roman.Li@amd.com</email>
</author>
<published>2020-09-29T15:21:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3a83e4e64bb1522ddac67ffc787d1c38291e1a65'/>
<id>urn:sha1:3a83e4e64bb1522ddac67ffc787d1c38291e1a65</id>
<content type='text'>
Update dc for vangogh support.

v2: fix compilation without DCN 301 set.

Signed-off-by: Roman Li &lt;Roman.Li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Get num_chans from VBIOS table</title>
<updated>2020-07-01T05:59:21Z</updated>
<author>
<name>Alvin Lee</name>
<email>alvin.lee2@amd.com</email>
</author>
<published>2020-06-11T20:37:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d31bdabbf5b6f5a667aefa2c381f7b534cad4f12'/>
<id>urn:sha1:d31bdabbf5b6f5a667aefa2c381f7b534cad4f12</id>
<content type='text'>
Get the values from VBIOS table

Signed-off-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add oem i2c implemenation in dc</title>
<updated>2019-11-13T20:29:43Z</updated>
<author>
<name>Jun Lei</name>
<email>Jun.Lei@amd.com</email>
</author>
<published>2019-08-02T21:22:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d9a07577b8a3131c90c187fb2b89662bee535cfd'/>
<id>urn:sha1:d9a07577b8a3131c90c187fb2b89662bee535cfd</id>
<content type='text'>
[why]
Need it for some OEM I2C devices in Nv10

[how]
Link up code to parse OEM table and expose DC interface
to access the pins

Signed-off-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add vbios table check for enabling dp ss</title>
<updated>2018-08-06T20:56:54Z</updated>
<author>
<name>Dmytro Laktyushkin</name>
<email>Dmytro.Laktyushkin@amd.com</email>
</author>
<published>2018-07-18T19:25:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ad830e7ab1847f4a014c04496b2581a7497b204f'/>
<id>urn:sha1:ad830e7ab1847f4a014c04496b2581a7497b204f</id>
<content type='text'>
Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Eric Bernstein &lt;Eric.Bernstein@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
