<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/include, branch for-next</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=for-next</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=for-next'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2024-11-04T16:26:36Z</updated>
<entry>
<title>drm/amd/display: Remove last parts of timing_trace</title>
<updated>2024-11-04T16:26:36Z</updated>
<author>
<name>Dr. David Alan Gilbert</name>
<email>linux@treblig.org</email>
</author>
<published>2024-10-10T20:51:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5fd95dab6094ba0b851767fc460c2806eaafe8bd'/>
<id>urn:sha1:5fd95dab6094ba0b851767fc460c2806eaafe8bd</id>
<content type='text'>
Commit c2c2ce1e9623 ("drm/amd/display: Optimize passive update planes.")
removed the last caller of context_timing_trace.
Remove it.

With that gone, no one is now looking at the 'timing_trace' flag, remove
it and all the places that set it.

Signed-off-by: Dr. David Alan Gilbert &lt;linux@treblig.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Read Sink emission rate capability</title>
<updated>2024-10-15T15:23:45Z</updated>
<author>
<name>Robin Chen</name>
<email>robin.chen@amd.com</email>
</author>
<published>2024-09-12T12:59:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=668d6808e9f23305e0eb108dbf75fc13ab344ae8'/>
<id>urn:sha1:668d6808e9f23305e0eb108dbf75fc13ab344ae8</id>
<content type='text'>
[WHY]
To get sink emission rate information for future
supported refresh rate calculation.

Reviewed-by: ChunTao Tso &lt;chuntao.tso@amd.com&gt;
Signed-off-by: Robin Chen &lt;robin.chen@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add logs to record register read/write</title>
<updated>2024-10-01T21:37:07Z</updated>
<author>
<name>Paul Hsieh</name>
<email>paul.hsieh@amd.com</email>
</author>
<published>2024-09-12T06:47:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=419198437e56c9c31fac2a7b165ecce534b5e9db'/>
<id>urn:sha1:419198437e56c9c31fac2a7b165ecce534b5e9db</id>
<content type='text'>
[Why]
There are some issues which customer only can provide full
dump for analyze, without register history, it's hard to
debug HW status.

[How]
1. Put register read/write into WPP log so we can trace the logs
from full memory dump.
2. MALL doesn't add into WPP, add it.

Reviewed-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Signed-off-by: Paul Hsieh &lt;paul.hsieh@amd.com&gt;
Signed-off-by: Fangzhi Zuo &lt;jerry.zuo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add more logging for MALL static screen</title>
<updated>2024-08-13T14:32:35Z</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2024-07-30T18:57:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8c4f9e466169b3e411947347fef09382c14e5733'/>
<id>urn:sha1:8c4f9e466169b3e411947347fef09382c14e5733</id>
<content type='text'>
[why &amp; how]
print additional info for MALL related calculations and DMCUB messaging
to aid debugging.

Reviewed-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Revert Avoid overflow assignment</title>
<updated>2024-08-06T15:11:03Z</updated>
<author>
<name>Gabe Teeger</name>
<email>Gabe.Teeger@amd.com</email>
</author>
<published>2024-07-25T22:42:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e80f8f491df873ea2e07c941c747831234814612'/>
<id>urn:sha1:e80f8f491df873ea2e07c941c747831234814612</id>
<content type='text'>
This reverts commit a15268787b79 ("drm/amd/display: Avoid overflow assignment in link_dp_cts")
Due to regression causing DPMS hang.

Reviewed-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Gabe Teeger &lt;Gabe.Teeger@amd.com&gt;
Signed-off-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Avoid overflow assignment in link_dp_cts</title>
<updated>2024-07-27T21:34:20Z</updated>
<author>
<name>Alex Hung</name>
<email>alex.hung@amd.com</email>
</author>
<published>2024-07-17T15:17:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a15268787b79fd183dd526cc16bec9af4f4e49a1'/>
<id>urn:sha1:a15268787b79fd183dd526cc16bec9af4f4e49a1</id>
<content type='text'>
sampling_rate is an uint8_t but is assigned an unsigned int, and thus it
can overflow. As a result, sampling_rate is changed to uint32_t.

Similarly, LINK_QUAL_PATTERN_SET has a size of 2 bits, and it should
only be assigned to a value less or equal than 4.

This fixes 2 INTEGER_OVERFLOW issues reported by Coverity.

Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: remove dc dependencies from SPL library</title>
<updated>2024-07-23T21:07:12Z</updated>
<author>
<name>Samson Tam</name>
<email>samson.tam@amd.com</email>
</author>
<published>2024-07-03T16:23:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f82200703434522f1b35d38bdef02486d22b2f25'/>
<id>urn:sha1:f82200703434522f1b35d38bdef02486d22b2f25</id>
<content type='text'>
[Why]
Make SPL library dc-independent so it can be reused by other
 components

[How]
Create separate set of fixed31_32 calls in SPL
Make all inputs and outputs to SPL use primitive types
For ratios and inits, return as uint32 from SPL.  So
 add conversion from uint32 back to fixed point in
 SPL-to-dc translate function

Reviewed-by: Relja Vojvodic &lt;relja.vojvodic@amd.com&gt;
Signed-off-by: Jerry Zuo &lt;jerry.zuo@amd.com&gt;
Signed-off-by: Samson Tam &lt;samson.tam@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge v6.10-rc6 into drm-next</title>
<updated>2024-07-05T08:47:28Z</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2024-07-05T08:35:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=86634fa4e6aeff2e190616c304156899beb4d76b'/>
<id>urn:sha1:86634fa4e6aeff2e190616c304156899beb4d76b</id>
<content type='text'>
The exynos-next pull is based on a newer -rc than drm-next. hence
backmerge first to make sure the unrelated conflicts we accumulated
don't end up randomly in the exynos merge pull, but are separated out.

Conflicts are all benign: Adjacent changes in amdgpu and fbdev-dma
code, and cherry-pick conflict in xe.

Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is present</title>
<updated>2024-06-25T18:15:45Z</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2023-11-28T15:31:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2ec6c7f802332d1eff16f03e7c757f1543ee1183'/>
<id>urn:sha1:2ec6c7f802332d1eff16f03e7c757f1543ee1183</id>
<content type='text'>
[WHY]
New register field added in DP2.1 SCR, needed for auxless ALPM

[HOW]
Echo value read from 0xF0007 back to sink

Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix graphics_object_id size</title>
<updated>2024-05-29T18:48:31Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2024-05-28T11:51:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6d438caaeaa1a7fae7b523e7bc4cee262b9f101a'/>
<id>urn:sha1:6d438caaeaa1a7fae7b523e7bc4cee262b9f101a</id>
<content type='text'>
The graphics_object_id structure is meant to fit into 32 bits, as it's
passed by value in and out of functions. A recent change increased
the size to 128 bits, so it's now always passed by reference, which
is clearly not intended and ends up producing a compile-time warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c: In function 'construct_phy':
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c:743:1: error: the frame size of 1040 bytes is larger than 1024 bytes [-Werror=frame-larger-than=]

Add back the bitfields to revert to the original size, while keeping
the 'enum' type change.

Fixes: fec85f995a4b ("drm/amd/display: Fix compiler redefinition warnings for certain configs")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
