<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/include, branch v5.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-12-18T22:39:56Z</updated>
<entry>
<title>drm/amd/display: Add functionality to get XGMI SS info</title>
<updated>2018-12-18T22:39:56Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2018-10-31T21:07:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1c01a45a86ed6991953e74be63b6a7e33b387954'/>
<id>urn:sha1:1c01a45a86ed6991953e74be63b6a7e33b387954</id>
<content type='text'>
[Why]
When XGMI is enabled, the DP reference clock needs to be adjusted
according to the XGMI spread spectrum percentage and mode. But first,
we need the ability to fetch this info.

[How]
Within the BIOS parser, Read from vBIOS when XGMI SS info is requested.

In addition, diags build uses include_legacy/atomfirmware.h for the
smu_info_v3_3 table headers. Update that as well.

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCE_VERSION_12_1 enum for Vega 20</title>
<updated>2018-12-18T22:39:49Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2018-10-31T20:56:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b8b6ce89016485cb92fdf2f527b40249aefbc470'/>
<id>urn:sha1:b8b6ce89016485cb92fdf2f527b40249aefbc470</id>
<content type='text'>
[Why]
We'll need a way to differentiate Vega 20 in DC

[How]
Add a DCE_VERSION_12_1 enum, which will be returned as the DC version if
the ASIC used is a Vega 20.

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: David Francis &lt;David.Francis@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add a check-function for virtual signal type</title>
<updated>2018-10-09T22:01:48Z</updated>
<author>
<name>Nikola Cornij</name>
<email>nikola.cornij@amd.com</email>
</author>
<published>2018-09-12T19:17:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cbad73147fe20be018d976ea59c82bdf26e46151'/>
<id>urn:sha1:cbad73147fe20be018d976ea59c82bdf26e46151</id>
<content type='text'>
[why]
Same functions exist for all other signal types.

[how]
Add a function that checks against virtual signal type.

Signed-off-by: Nikola Cornij &lt;nikola.cornij@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add Raven2 definitions in dc</title>
<updated>2018-09-14T14:36:47Z</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2018-01-22T21:12:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0e3d73f1a440eaca270a028bff51649ae99df113'/>
<id>urn:sha1:0e3d73f1a440eaca270a028bff51649ae99df113</id>
<content type='text'>
Add Raven2 definitions in the dc code

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Support reading hw state from debugfs file</title>
<updated>2018-08-27T20:20:49Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2018-08-15T16:00:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=46659a83e4662ed92000ec13445b8c0ca96fd2cc'/>
<id>urn:sha1:46659a83e4662ed92000ec13445b8c0ca96fd2cc</id>
<content type='text'>
[Why]

Logging hardware state can be done by triggering a write to the
debugfs file. It would also be useful to be able to read the hardware
state from the debugfs file to be able to generate a clean log without
timestamps.

[How]

Usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log

Threading is an obvious concern when dealing with multiple debugfs
operations and blocking on global state in dm or dc seems unfavorable.

Adding an extra parameter for the debugfs log context state is the
implementation done here. Existing code that made use of DTN_INFO
and its associated macros needed to be refactored to support this.

We don't know the size of the log in advance so it reallocates the
log string dynamically. Once the log has been generated it's copied
into the user supplied buffer for the debugfs. This allows for seeking
support but it's worth nothing that unlike triggering output via
dmesg the hardware state might change in-between reads if your buffer
size is too small.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Jordan Lazare &lt;Jordan.Lazare@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: add support for LVDS (v5)</title>
<updated>2018-08-27T16:11:15Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-08-14T19:53:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=11c3ee48bd7c232c0a750b4dde8ee48f315dcdf3'/>
<id>urn:sha1:11c3ee48bd7c232c0a750b4dde8ee48f315dcdf3</id>
<content type='text'>
This adds support for LVDS displays.

v2: add support for spread spectrum, sink detect
v3: clean up enable_lvds_output
v4: fix up link_detect
v5: remove assert on 888 format

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105880
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Refactor FreeSync module</title>
<updated>2018-08-27T16:10:51Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2018-08-21T19:40:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=98e6436d3af5fef7ca9b59d865dd5807ede36fb9'/>
<id>urn:sha1:98e6436d3af5fef7ca9b59d865dd5807ede36fb9</id>
<content type='text'>
Remove dependency on internal sink map and instead
use existing stream and plane state

Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add retimer log for HWQ tuning use.</title>
<updated>2018-08-27T16:10:15Z</updated>
<author>
<name>Charlene Liu</name>
<email>charlene.liu@amd.com</email>
</author>
<published>2018-08-01T00:14:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2f14bc8968e3d97fc46bb464045d0fa8fbd2b013'/>
<id>urn:sha1:2f14bc8968e3d97fc46bb464045d0fa8fbd2b013</id>
<content type='text'>
Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Set DFS bypass flags for dce110</title>
<updated>2018-08-27T16:09:49Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2018-07-24T17:19:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4e60536d093f486229bb8d86c739e8ef6446df85'/>
<id>urn:sha1:4e60536d093f486229bb8d86c739e8ef6446df85</id>
<content type='text'>
[Why]

While there is support for using and quering DFS bypass clocks the
hardware is never notified to enter DFS bypass mode for dce110.

[How]

Add a flag that can be set when programming the display engine PLL
to enable DFS bypass mode. If this flag is set then the hardware is
notified to enter DFS bypass mode and the correct display engine clock
frequency can be acquired.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add vbios table check for enabling dp ss</title>
<updated>2018-08-06T20:56:54Z</updated>
<author>
<name>Dmytro Laktyushkin</name>
<email>Dmytro.Laktyushkin@amd.com</email>
</author>
<published>2018-07-18T19:25:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ad830e7ab1847f4a014c04496b2581a7497b204f'/>
<id>urn:sha1:ad830e7ab1847f4a014c04496b2581a7497b204f</id>
<content type='text'>
Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Eric Bernstein &lt;Eric.Bernstein@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
