<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/include, branch v5.1</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.1</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.1'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-02-19T20:58:26Z</updated>
<entry>
<title>drm/amd/display: remove screen flashes on seamless boot</title>
<updated>2019-02-19T20:58:26Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2019-01-20T06:54:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ce72741b53cdc70f9738c04920fefb93448f1f5e'/>
<id>urn:sha1:ce72741b53cdc70f9738c04920fefb93448f1f5e</id>
<content type='text'>
[Why]
We want boot to desktop to be seamless

[How]
During init pipes, avoid touching the pipes where GOP has already
enabled the HW to the state we want.

Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add gpio lock/unlock</title>
<updated>2019-02-06T02:16:23Z</updated>
<author>
<name>Chiawen Huang</name>
<email>chiawen.huang@amd.com</email>
</author>
<published>2019-01-18T06:07:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ac627caf6b9275a3df4730be3b8637c3bc232979'/>
<id>urn:sha1:ac627caf6b9275a3df4730be3b8637c3bc232979</id>
<content type='text'>
[Why]
When querying HPD via GPIO flow,
it will create a new gpio object then free in the end of query.
There is a irql issue for HPD querying at ISR level.

[How]
Therefore, creating the HPD gpio object in dc_link and set it as unlcok in default.
1. reducing unnecessary malloc/free when HPD querying.
2. reducing init GPIO flow.
3. add lock/unlock to prevent multi gpio service running.

Signed-off-by: Chiawen Huang &lt;chiawen.huang@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove i2caux folder</title>
<updated>2019-01-14T20:40:54Z</updated>
<author>
<name>David Francis</name>
<email>David.Francis@amd.com</email>
</author>
<published>2018-11-30T16:02:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=077d0b6ba2114b86d353fce4eaca6cfb2e344eb6'/>
<id>urn:sha1:077d0b6ba2114b86d353fce4eaca6cfb2e344eb6</id>
<content type='text'>
[Why]
It is huge, unmaintainable, needlessly layered, and obsolete

[How]
Remove it.  All of it.  Also remove the i2caux struct in
dc_context and the code that created and destructed it

Signed-off-by: David Francis &lt;David.Francis@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Shift dc link aux to aux_payload</title>
<updated>2019-01-14T20:40:33Z</updated>
<author>
<name>David Francis</name>
<email>David.Francis@amd.com</email>
</author>
<published>2018-11-29T18:40:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ad6756b4d773aae68430a7d8b3c35c6717de5a15'/>
<id>urn:sha1:ad6756b4d773aae68430a7d8b3c35c6717de5a15</id>
<content type='text'>
[Why]
aux_payload should be the struct used inside dc to start
aux transactions.  This will allow the old aux interface
to be seamlessly replaced.

[How]
Add three fields to aux_payload: reply, mot, defer_delay
This will mean that aux_payload has all data required
to submit a request.  Shift dc_link to use this struct

Signed-off-by: David Francis &lt;David.Francis@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Use 100 Hz precision for pipe pixel clocks</title>
<updated>2019-01-14T20:04:39Z</updated>
<author>
<name>Ken Chalmers</name>
<email>ken.chalmers@amd.com</email>
</author>
<published>2018-11-06T19:24:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=380604e27bc9c26ce64a83044aa1ea76ffd28caf'/>
<id>urn:sha1:380604e27bc9c26ce64a83044aa1ea76ffd28caf</id>
<content type='text'>
[Why]
Users would like more accurate pixel clocks, especially for fractional
"TV" frame rates like 59.94 Hz.

[How]
Store and communicate pixel clocks with 100 Hz accuracy from
dc_crtc_timing through to BIOS command table setpixelclock call.

Signed-off-by: Ken Chalmers &lt;ken.chalmers@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add functionality to get XGMI SS info</title>
<updated>2018-12-18T22:39:56Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2018-10-31T21:07:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1c01a45a86ed6991953e74be63b6a7e33b387954'/>
<id>urn:sha1:1c01a45a86ed6991953e74be63b6a7e33b387954</id>
<content type='text'>
[Why]
When XGMI is enabled, the DP reference clock needs to be adjusted
according to the XGMI spread spectrum percentage and mode. But first,
we need the ability to fetch this info.

[How]
Within the BIOS parser, Read from vBIOS when XGMI SS info is requested.

In addition, diags build uses include_legacy/atomfirmware.h for the
smu_info_v3_3 table headers. Update that as well.

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCE_VERSION_12_1 enum for Vega 20</title>
<updated>2018-12-18T22:39:49Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2018-10-31T20:56:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b8b6ce89016485cb92fdf2f527b40249aefbc470'/>
<id>urn:sha1:b8b6ce89016485cb92fdf2f527b40249aefbc470</id>
<content type='text'>
[Why]
We'll need a way to differentiate Vega 20 in DC

[How]
Add a DCE_VERSION_12_1 enum, which will be returned as the DC version if
the ASIC used is a Vega 20.

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: David Francis &lt;David.Francis@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add a check-function for virtual signal type</title>
<updated>2018-10-09T22:01:48Z</updated>
<author>
<name>Nikola Cornij</name>
<email>nikola.cornij@amd.com</email>
</author>
<published>2018-09-12T19:17:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cbad73147fe20be018d976ea59c82bdf26e46151'/>
<id>urn:sha1:cbad73147fe20be018d976ea59c82bdf26e46151</id>
<content type='text'>
[why]
Same functions exist for all other signal types.

[how]
Add a function that checks against virtual signal type.

Signed-off-by: Nikola Cornij &lt;nikola.cornij@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add Raven2 definitions in dc</title>
<updated>2018-09-14T14:36:47Z</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2018-01-22T21:12:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0e3d73f1a440eaca270a028bff51649ae99df113'/>
<id>urn:sha1:0e3d73f1a440eaca270a028bff51649ae99df113</id>
<content type='text'>
Add Raven2 definitions in the dc code

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Support reading hw state from debugfs file</title>
<updated>2018-08-27T20:20:49Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2018-08-15T16:00:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=46659a83e4662ed92000ec13445b8c0ca96fd2cc'/>
<id>urn:sha1:46659a83e4662ed92000ec13445b8c0ca96fd2cc</id>
<content type='text'>
[Why]

Logging hardware state can be done by triggering a write to the
debugfs file. It would also be useful to be able to read the hardware
state from the debugfs file to be able to generate a clean log without
timestamps.

[How]

Usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log

Threading is an obvious concern when dealing with multiple debugfs
operations and blocking on global state in dm or dc seems unfavorable.

Adding an extra parameter for the debugfs log context state is the
implementation done here. Existing code that made use of DTN_INFO
and its associated macros needed to be refactored to support this.

We don't know the size of the log in advance so it reallocates the
log string dynamically. Once the log has been generated it's copied
into the user supplied buffer for the debugfs. This allows for seeking
support but it's worth nothing that unlike triggering output via
dmesg the hardware state might change in-between reads if your buffer
size is too small.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Jordan Lazare &lt;Jordan.Lazare@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
