<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/include, branch v5.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-04-03T21:21:06Z</updated>
<entry>
<title>drm/amd/display: re-order asic declarations</title>
<updated>2020-04-03T21:21:06Z</updated>
<author>
<name>Shirish S</name>
<email>shirish.s@amd.com</email>
</author>
<published>2020-04-02T09:10:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=36a5a5816103ea96a24ac93baff8c8dc248aae1e'/>
<id>urn:sha1:36a5a5816103ea96a24ac93baff8c8dc248aae1e</id>
<content type='text'>
Fixes build error of:
"use of undeclared identifier 'RENOIR_A0'"

To fix the same, this patch re-orders the
ASIC declarations accordingly.

Fixes: 41ef3dcd86443fa ("drm/amd/display: Fix RV2 Variant Detection")
Signed-off-by: Shirish S &lt;shirish.s@amd.com&gt;
Reviewed-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: Fix Pollock Variant Detection</title>
<updated>2020-03-09T17:51:03Z</updated>
<author>
<name>Aly-Tawfik</name>
<email>altawfik@amd.com</email>
</author>
<published>2020-02-25T20:01:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6cc47f3f96345fb21eaff8996d31939ffbda0f58'/>
<id>urn:sha1:6cc47f3f96345fb21eaff8996d31939ffbda0f58</id>
<content type='text'>
Problem Description:
Currently we are checking internal fused rev id with pci rev id. However, fused
internal rev id is the same on all raven2 parts (in which Dali and Pollock were
based on too), thus Pollock detection fails

Fix:
use the pci rev to preform the detection for bandwidth calculations.

Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Aly-Tawfik &lt;altawfik@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix default logger mask definition</title>
<updated>2020-03-05T05:31:38Z</updated>
<author>
<name>Eric Bernstein</name>
<email>eric.bernstein@amd.com</email>
</author>
<published>2020-02-20T22:01:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ccb6af1e25830e5601b6beacc698390f0245316f'/>
<id>urn:sha1:ccb6af1e25830e5601b6beacc698390f0245316f</id>
<content type='text'>
[Why]
Logger mask was updated to uint64_t, however default mask definition was
not updated for unsigned long long

[How]
Update DC_DEFAULT_LOG_MASK to support uint64_t type

Signed-off-by: Eric Bernstein &lt;eric.bernstein@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix RV2 Variant Detection</title>
<updated>2020-02-25T16:09:12Z</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2020-02-13T20:08:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=41ef3dcd86443fab3f0ba50902d13935bc12d24f'/>
<id>urn:sha1:41ef3dcd86443fab3f0ba50902d13935bc12d24f</id>
<content type='text'>
[WHY]
RV2 and variants are indistinguishable by hw internal rev alone, need to
be distinguishable in order to correctly set max vlevel.  Previous
detection change incorrectly checked for hw internal rev.

[HOW]
Use pci revision to check if RV2 or low power variant Correct a few
overlapping ASICREV range checks

Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Reviewed-by: Michael Strauss &lt;Michael.Strauss@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add AUX backlight register</title>
<updated>2020-02-11T16:50:00Z</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2020-01-28T23:01:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8a683eb6311a03b655ab8ff368cd7b203074275c'/>
<id>urn:sha1:8a683eb6311a03b655ab8ff368cd7b203074275c</id>
<content type='text'>
Introduce vendor-specific registers for handling backlight via AUX.

Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add Pollock IDs, fix Pollock &amp; Dali clk mgr construct</title>
<updated>2020-01-14T15:18:10Z</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2019-11-04T18:39:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=61e50646f0bbfb24002c4935e1ed9bf04ae4266e'/>
<id>urn:sha1:61e50646f0bbfb24002c4935e1ed9bf04ae4266e</id>
<content type='text'>
[WHY]
Only a single voltage level should be available to Pollock (min level)
Pollock &amp; Dali get misidentified as Renoir, use wrong clk mgr constructor

[HOW]
Add provided Pollock IDs to ASIC Rev. ID list.
Create new Pollock ASIC RID check, fix RV2 &amp; Dali ASIC checks.
Check RID and set max voltage level to 0 if Pollock is detected.
Work around broken ASICREV_IS_RENOIR, IS_RAVEN2, etc. checks by
performing Dali/Pollock checks before they can be misidentified as RN.

Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add warmup escape call support</title>
<updated>2019-12-18T21:09:09Z</updated>
<author>
<name>Charlene Liu</name>
<email>charlene.liu@amd.com</email>
</author>
<published>2019-11-21T02:23:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6a652f6d127dac1c67c413c3309258c874535dd1'/>
<id>urn:sha1:6a652f6d127dac1c67c413c3309258c874535dd1</id>
<content type='text'>
Add warmup escape support, for diags, in a way that is possible to
choose a new or an existing sequence. For achieving this goal, this
commit adds separated MCIF buffer as VCN request.

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Reviewed-by: Chris Park &lt;Chris.Park@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fixed that I2C over AUX didn't read data issue</title>
<updated>2019-12-05T21:29:19Z</updated>
<author>
<name>Brandon Syu</name>
<email>Brandon.Syu@amd.com</email>
</author>
<published>2019-11-08T03:26:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=769dbc16056769ed25904f4b7dfca35c0698c1cd'/>
<id>urn:sha1:769dbc16056769ed25904f4b7dfca35c0698c1cd</id>
<content type='text'>
[Why]
The variable mismatch assignment error.

[How]
To use uint32_t replace it.

Signed-off-by: Brandon Syu &lt;Brandon.Syu@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix Dali clk mgr construct</title>
<updated>2019-12-05T21:26:54Z</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2019-11-04T18:39:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=10f51857b753af25cc048d8c5791433ee94f9164'/>
<id>urn:sha1:10f51857b753af25cc048d8c5791433ee94f9164</id>
<content type='text'>
[WHY]
Dali is currently being misinterpreted as Renoir,
as a result uses wrong clk mgr constructor

[HOW]
Add check to init Dali as Raven2 before it can be misidentified
Clean up &amp; fix Raven2 &amp; Dali ASIC checks
Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Reviewed-by: Eric Yang &lt;eric.yang2@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add color space option when sending link test pattern</title>
<updated>2019-11-19T15:12:52Z</updated>
<author>
<name>Wenjing Liu</name>
<email>Wenjing.Liu@amd.com</email>
</author>
<published>2019-10-15T19:12:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2057b7e1cf77bdf090a3571a8d2ca00a76f34a9e'/>
<id>urn:sha1:2057b7e1cf77bdf090a3571a8d2ca00a76f34a9e</id>
<content type='text'>
[why]
In the TEST_MSIC dpcd register field definition, the test equipment
has the option to choose between YCbCr601 or YCbCr709.
We will apply corresponding YCbCr coefficient based on this test
request.

[how]
Add a new input parameter in dc_link_dp_set_test_pattern to allow the
selection between different color space.

Signed-off-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Reviewed-by: Nikola Cornij &lt;Nikola.Cornij@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
