linux/drivers/gpu/drm/amd/display/modules/freesync/freesync.c, branch v5.19

drm/amd/display: Fix inconsistent timestamp type

2022-04-12T18:19:51Z

[WHY] An unsigned int timestamp variable is assigned with an unsigned long long value. Also, the assignment directly converts the tick value to us without using built-in get elapsed time function. [HOW] Cast the assigned value correctly and also use built-in function to get the timestamp in the unit we want. v2: squash in 64 bit division fix Reviewed-by: Aric Cyr Acked-by: Pavle Kotarac Signed-off-by: Angus Wang Signed-off-by: Alex Deucher

drm/amd/display: fix 64 bit divide in freesync code

2022-04-11T17:50:35Z

Use div_u64() rather than a a 64 bit divide. Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround") Reviewed-by: Nathan Chancellor Reported-by: kernel test robot Signed-off-by: Alex Deucher Cc: Angus Wang Cc: Anthony Koo Cc: Aric Cyr Cc: Nathan Chancellor

drm/amd/dc: remove duplicate include

2022-04-06T14:20:50Z

'dm_services.h' included in 'freesync,c' is duplicated, so remove one. Reported-by: Zeal Robot Signed-off-by: Lv Ruyi Signed-off-by: Alex Deucher

drm/amd/display: Add flip interval workaround

2022-04-05T14:29:47Z

[WHY] Some games experience low FPS issues when FreeSync is on and VSync is toggled to half refresh rate. [HOW] First create a function to determine workaround conditions, which is when we detect 2 or more VSync interrupts between flips and a very short VSync to flip interval. We do the workaround during VSync interrupts and set the v_total_max and min to nominal. We also cleanup after we exit the game. Tested-by: Daniel Wheeler Reviewed-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Tom Chung Signed-off-by: Angus Wang Signed-off-by: Alex Deucher

drm/amd/display: Get ceiling for v_total calc

2021-10-28T18:26:14Z

Updating certain variable blanking calculations to use ceiling function. Reviewed-by: Chris Park Tested-by: Daniel Wheeler Acked-by: Agustin Gutierrez Signed-off-by: Bing Guo Signed-off-by: Alex Deucher

drm/amd/display: disable desktop VRR when using older flip model

2021-05-27T16:24:34Z

[WHY] OS uses older flip model which does not work with desktop VRR causing memory allocations at the wrong IRQ level. [HOW] Checks added to flip model to verify model is 2.2 or greater when doing any of the desktop VRR checks for full updates. This prevents full updates when VRR changes until a mode change. Signed-off-by: Harry VanZyllDeJong Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Fixed corruption on 4K tvs

2021-04-09T20:53:24Z

[WHY] When on the desktop freesync is not enabled, doing a frame stretch causes the TV to display undesired output. [HOW] By changing the logic so that when ever fresync is supported the TV is notified we are in fressync instead on a non fresync state. Signed-off-by: Harry VanZyllDeJong Reviewed-by: Tony Cheng Acked-by: Anthony Koo Acked-by: Jun Lei Acked-by: Qingqing Zhuo Signed-off-by: Alex Deucher

drm/amd/display: Change input parameter for set_drr

2021-04-09T20:41:36Z

[Why] Change set_drr to pass in the entire dc_crtc_timing_adjust structure instead of passing in the parameters individually. This is to more easily pass in required parameters in the adjust structure when it gets updated. Tested-by: Daniel Wheeler Signed-off-by: Alvin Lee Reviewed-by: Jun Lei Acked-by: Solomon Chiu Signed-off-by: Alex Deucher

drm/amd/display: Add flag for building infopacket

2021-03-02T19:06:29Z

[why] Add flag to build infopacket in SDP v1.3 format Tested-by: Daniel Wheeler Signed-off-by: Max.Tseng Reviewed-by: Anthony Koo Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Set FixRate bit in VSIF V3

2020-12-09T04:03:04Z

[Why] Signal FreeSync display that we are in Fixed Rate mode, and expand the FreeSync range to 1024. [How] Set the new bit in SB16:bit0, and augment the min and max refresh rate with 2 extra bits. Signed-off-by: AMD\ramini Reviewed-by: Anthony Koo Acked-by: Eryk Brol Signed-off-by: Alex Deucher