linux/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h, branch v6.17

drm/amd/display: Remove unused freesync functions

2025-02-13T02:03:02Z

mod_freesync_get_vmin_vmax() and mod_freesync_get_v_position() were added in 2017 by commit 72ada5f76939 ("drm/amd/display: FreeSync Auto Sweep Support") mod_freesync_is_valid_range() was added in 2018 by commit e80e94460841 ("drm/amd/display: add method to check for supported range") mod_freesync_get_settings() was added in 2018 by commit a3e1737ed61c ("drm/amd/display: Implement stats logging") and mod_freesync_calc_field_rate_from_timing() was added in 2020 by commit 49c70ece54b0 ("drm/amd/display: Change input parameter for set_drr") None of these have been used. Remove them. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Alex Deucher

drm/amd/display: Removing duplicate copyright text

2024-01-05T21:05:11Z

mod_freesync header file has duplicated copyright boilerplate. Drop the duplicate. Signed-off-by: Marcelo Mendes Spessoto Junior Signed-off-by: Alex Deucher

drm/amd/display: Add vrr_active_variable to dc_stream_update

2022-06-15T01:38:41Z

[WHY] The display driver on some OSes need to track it in order to perform memory clock switching decisions. [HOW] Propagate the vrr active state to dirty bit so that on mode set it disables dynamic memory clock switching. Acked-by: Alan Liu Signed-off-by: Harry VanZyllDeJong Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Firmware assisted MCLK switch and FS

2022-06-15T01:38:41Z

[WHY] Memory clock switching has great potential for power savings. [HOW] The driver code was modified to notify the DMCUB firmware that it should stretch the vertical blank of frames when a memory clock switch is about to start so that no blackouts happen on the screen due to unavailability of the frame buffer. The driver logic to determine when such firmware assisted strategy can be initiated is also implemented and consists on checking prerequisites of the feature. Acked-by: Alan Liu Signed-off-by: Felipe Clark Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add flip interval workaround

2022-04-05T14:29:47Z

[WHY] Some games experience low FPS issues when FreeSync is on and VSync is toggled to half refresh rate. [HOW] First create a function to determine workaround conditions, which is when we detect 2 or more VSync interrupts between flips and a very short VSync to flip interval. We do the workaround during VSync interrupts and set the v_total_max and min to nominal. We also cleanup after we exit the game. Tested-by: Daniel Wheeler Reviewed-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Tom Chung Signed-off-by: Angus Wang Signed-off-by: Alex Deucher

drm/amd/display: Change input parameter for set_drr

2021-04-09T20:41:36Z

[Why] Change set_drr to pass in the entire dc_crtc_timing_adjust structure instead of passing in the parameters individually. This is to more easily pass in required parameters in the adjust structure when it gets updated. Tested-by: Daniel Wheeler Signed-off-by: Alvin Lee Reviewed-by: Jun Lei Acked-by: Solomon Chiu Signed-off-by: Alex Deucher

drm/amd/display: Add flag for building infopacket

2021-03-02T19:06:29Z

[why] Add flag to build infopacket in SDP v1.3 format Tested-by: Daniel Wheeler Signed-off-by: Max.Tseng Reviewed-by: Anthony Koo Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Fix incorrect rounding for 10Hz refresh range

2020-07-02T16:02:54Z

[Why] In cases where refresh range is slightly below 10, FreeSync is not active or supported. Need to round values before checking refresh range in order to have FreeSync supported in these cases. [How] Remove redundant values and round values before checking valid refresh range. Signed-off-by: Jaehyun Chung Reviewed-by: Aric Cyr Acked-by: Anthony Koo Acked-by: Eryk Brol Signed-off-by: Alex Deucher

drm/amd/display: Change infopacket type programming

2020-04-22T22:11:47Z

[Why] Certain displays may experience blanking if infopacket max range does not equal nominal refresh rate. [How] Add additional infopacket versions to program range to full or forced range in freesync states. This does not change the vrr logic. Signed-off-by: Haiyi Zhou Reviewed-by: Anthony Koo Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Reinstate LFC optimization

2019-12-18T21:09:08Z

[why] We want to streamline the calculations made when entering LFC. Previously, the optimizations led to screen tearing and were backed out to unblock development. [how] Integrate other calculations parameters, as well as screen tearing, fixes with the original LFC calculation optimizations. Signed-off-by: Amanda Liu Reviewed-by: Aric Cyr Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher