linux/drivers/gpu/drm/amd/display/modules, branch v5.0

drm/amd/display: Pack DMCU iRAM alignment

2019-01-14T21:00:17Z

[Why] When the DMCU's iRAM definition was moved to the newly created power_helpers, a #pragma pack was lost, causing the iRAM to be misaligned [How] Restore the #pragma pack Signed-off-by: Josip Pavic Reviewed-by: Anthony Koo Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: Info frame cleanup

2018-11-30T17:02:28Z

* Use provided infopacket in stream (if valid) instead of reconstructing in set_vendor_info_packet() * Use proper format for enums * Use dc info packet struct instead Signed-off-by: Harmanprit Tatla Reviewed-by: Anthony Koo Acked-by: Krunoslav Kovac Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: Fix spelling of axis in modules/color/color_gamma.c

2018-11-30T17:02:13Z

Use axis instead of axix Signed-off-by: Krunoslav Kovac Reviewed-by: Aric Cyr Acked-by: Anthony Koo Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: Load DMCU IRAM

2018-11-26T20:47:53Z

DMCU IRAM must be loaded by the driver before DMCU can function. Move the IRAM code out of the shadows and into a new file modules/power/power_helpers.c The IRAM table contains the backlight curve and ABM parameters Add this new file to the Makefiles Call dmcu_load_iram in late init of DM Move struct dmcu_version from dc.h to dmcu.h to allow dmcu to be included on its own Signed-off-by: David Francis Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher

drm/amd/display: fix dereference of pointer fs_params before it is null checked

2018-11-21T20:32:20Z

Currently there are several instances of pointer fs_params being dereferenced before fs_params is being null checked. Fix this by only dereferencing fs_params after the null check. Detected by CoverityScan, CID#1475565 ("Dereference before null check") Fixes: e1e8a020c6b8 ("drm/amd/display: Add support for Freesync 2 HDR and Content to Display Mapping") Signed-off-by: Colin Ian King Reviewed-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: Clip all remaining regamma points after first clipped point

2018-11-05T19:21:33Z

[Why] All values computed in the gamma curve after the first upperbound clipped point will need to be clipped anyways. We can avoid unnecessary computations and potential fixed point overflow by instead clipping these values to 1 automatically. [How] Track if upper-bound clipping has been done, and clip all values after this threshold is reached without computing the output gamma point. Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Krunoslav Kovac Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: Set gamma not working on MPO planes

2018-11-05T19:21:31Z

[Why] Set gamma not working on certain planes in MPO configuration Root cause is that video format (YUV-420) isn't allowed for IGAM where gamma is applied. Fix is not easy though: 1. allowing will not work because IGAM is before ICSC so RGB gamma would be applied on YUV pixels. 2. Moving OS gamma to DGAM or RGAM resulted in weird artifacts. Ultimately the root cause for these artifacts was due to handling end points and the fact that YUV->RGB conversion will frequently "overshoot" FP 1.0 value. DCE has a single end point and slope, so we would take max. In nightlight mode, blue channel is reduced, sometimes to flat 0 line, but red is virtually unchanged. Any "overshot" in blue will be clipped to 1 (max R,G,B) instead of max blue value. [How] Fortunately, this can be fixed on DCN where we have end point and slope for all three color channels. We cannot fix this problem on DCE. Other things fixed: - switch (back) to using RGAM for OS gamma instead of IGAM - add coeffs for 709 YUV->RGB (we used RGB->YUV for both conversions) - switch color temperature method to scaled bradford - otherwise we would have clipping problems that caused us to switch to IGAM for OS gamma in the first place. - comments and some minor improvements - there are some more issues but they will be addressed in separate commits. Signed-off-by: Krunoslav Kovac Reviewed-by: Aric Cyr Acked-by: Leo Li Signed-off-by: Alex Deucher

drm/amd/display: Fix incorrect end slope of EETF

2018-11-05T19:20:51Z

Force the E2 to dc_fixpt_one when E1 exceeds that value. This is the correct thing to do to avoid corruption. Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Krunoslav Kovac Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: Add support for Freesync 2 HDR and Content to Display Mapping

2018-11-05T19:20:43Z

[Why] Freesync 2 HDR and support for HDR content outside the range of the HDR display require implementation on Dal 3 to better match Dal2. [How] Add support for Freesync HDR and mapping of source content to display ranges for better representation of HDR content. Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Anthony Koo Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher

drm/amd/display: Freesync does not engage on some displays

2018-11-05T19:20:41Z

[Why] Current render margin time is not sufficient to compute exit frame time for most monitors. [How] Declared render margin in FPS to compute a exit frame rate that is 4 FPS above the minimum FPS required to engage FreeSync. Also did code clean-up to remove redundancies. Signed-off-by: Harmanprit Tatla Reviewed-by: Anthony Koo Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher