<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/modules, branch v5.11</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.11</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.11'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-12-23T20:01:47Z</updated>
<entry>
<title>drm/amd/display: gradually ramp ABM intensity</title>
<updated>2020-12-23T20:01:47Z</updated>
<author>
<name>Rizvi</name>
<email>syerizvi@amd.com</email>
</author>
<published>2020-12-02T21:52:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e8e91f9395ef13cf054860f8ccd757333d9b6d0d'/>
<id>urn:sha1:e8e91f9395ef13cf054860f8ccd757333d9b6d0d</id>
<content type='text'>
[Why]
Need driver to pass values of backlight ramp start and ramp reduction so
that intensity can be ramped down appropriately.

[How]
Using abm_parameters structure to get these values from driver.

Signed-off-by: Rizvi &lt;syerizvi@amd.com&gt;
Acked-by: Bindu Ramamurthy &lt;bindu.r@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Modify the hdcp device count check condition</title>
<updated>2020-12-23T20:01:34Z</updated>
<author>
<name>Martin Tsai</name>
<email>martin.tsai@amd.com</email>
</author>
<published>2020-12-03T02:47:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c2d61e309171437e042f4c859e88077fffee18e5'/>
<id>urn:sha1:c2d61e309171437e042f4c859e88077fffee18e5</id>
<content type='text'>
[why]
Some MST display may not report the internal panel to DEVICE_COUNT,
that makes the check condition always failed.

[how]
To update this condition with the reported device count + 1
(because the immediate repeater's internal panel is possibly
not included in DEVICE_COUNT)

Signed-off-by: Martin Tsai &lt;martin.tsai@amd.com&gt;
Acked-by: Bindu Ramamurthy &lt;bindu.r@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix OGAM LUT calculation precision</title>
<updated>2020-12-15T16:34:35Z</updated>
<author>
<name>Felipe</name>
<email>Felipe.Clark@amd.com</email>
</author>
<published>2020-11-30T22:38:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e10777a67963163055f9ca43292cb21ff52967d2'/>
<id>urn:sha1:e10777a67963163055f9ca43292cb21ff52967d2</id>
<content type='text'>
[Why]
The OGAM LUT precision was accumulating too much error
in the higher end.

[How]
Instead of calculating all points of the LUT in relation
to the previous ones, perform a full calculation in one
of the intermediate segments to stop error propagation.

Signed-off-by: Felipe Clark &lt;Felipe.Clark@amd.com&gt;
Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Set FixRate bit in VSIF V3</title>
<updated>2020-12-09T04:03:04Z</updated>
<author>
<name>AMD\ramini</name>
<email>Reza.Amini@amd.com</email>
</author>
<published>2020-11-24T22:08:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=983bcb4cbe259ca6b2e03a6133364681aff1b88b'/>
<id>urn:sha1:983bcb4cbe259ca6b2e03a6133364681aff1b88b</id>
<content type='text'>
[Why]
Signal FreeSync display that we are in Fixed Rate mode, and
expand the FreeSync range to 1024.

[How]
Set the new bit in SB16:bit0, and augment the min and max
refresh rate with 2 extra bits.

Signed-off-by: AMD\ramini &lt;Reza.Amini@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Eryk Brol &lt;eryk.brol@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Implement VSIF V3 extended refresh rate feature</title>
<updated>2020-12-09T04:02:57Z</updated>
<author>
<name>Reza Amini</name>
<email>Reza.Amini@amd.com</email>
</author>
<published>2020-07-09T22:01:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9bc41626658271de26cd9086c6e82811ca334dd2'/>
<id>urn:sha1:9bc41626658271de26cd9086c6e82811ca334dd2</id>
<content type='text'>
[Why]
Implement feature of VSIF V3

[How]
Set refresh rate MSB for extended range

Signed-off-by: Reza Amini &lt;Reza.Amini@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Eryk Brol &lt;eryk.brol@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)</title>
<updated>2020-11-04T22:11:37Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-11-02T20:37:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=20f2ffe504728612d7b0c34e4f8280e34251e704'/>
<id>urn:sha1:20f2ffe504728612d7b0c34e4f8280e34251e704</id>
<content type='text'>
Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt; (v1)
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: set hdcp1 wa re-auth delay to 200ms</title>
<updated>2020-11-02T20:32:03Z</updated>
<author>
<name>Jake Wang</name>
<email>haonan.wang2@amd.com</email>
</author>
<published>2020-10-22T19:23:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=12f86dfc075b51a27cac81005a4583b2631234ac'/>
<id>urn:sha1:12f86dfc075b51a27cac81005a4583b2631234ac</id>
<content type='text'>
[Why]
Fail and restart timing for HDCP1 retry occurs too quickly.
This would cause some MST monitors to show black screen.

[How]
Adjusted timing of fail and restart to 200ms.

Signed-off-by: Jake Wang &lt;haonan.wang2@amd.com&gt;
Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix build_coefficients() argument</title>
<updated>2020-11-02T01:02:01Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2020-10-26T21:00:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dbb60031dd0c2b85f10ce4c12ae604c28d3aaca4'/>
<id>urn:sha1:dbb60031dd0c2b85f10ce4c12ae604c28d3aaca4</id>
<content type='text'>
gcc -Wextra warns about a function taking an enum argument
being called with a bool:

drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c: In function 'apply_degamma_for_user_regamma':
drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.c:1617:29: warning: implicit conversion from 'enum &lt;anonymous&gt;' to 'enum dc_transfer_func_predefined' [-Wenum-conversion]
 1617 |  build_coefficients(&amp;coeff, true);

It appears that a patch was added using the old calling conventions
after the type was changed, and the value should actually be 0
(TRANSFER_FUNCTION_SRGB) here instead of 1 (true).

Fixes: 55a01d4023ce ("drm/amd/display: Add user_regamma to color module")
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: remove unneeded semicolon</title>
<updated>2020-10-30T05:03:02Z</updated>
<author>
<name>Tom Rix</name>
<email>trix@redhat.com</email>
</author>
<published>2020-10-27T20:07:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0b924cd60d43f411f3133fbb39c1e4c82c7b2b18'/>
<id>urn:sha1:0b924cd60d43f411f3133fbb39c1e4c82c7b2b18</id>
<content type='text'>
A semicolon is not needed after a switch statement.

Signed-off-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: combined user regamma and OS GAMMA_CS_TFM_1D</title>
<updated>2020-10-26T17:34:54Z</updated>
<author>
<name>Derek Lai</name>
<email>Derek.Lai@amd.com</email>
</author>
<published>2020-10-14T04:43:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5d1b3211da033db56700fbdb3be5d90cea56a0c2'/>
<id>urn:sha1:5d1b3211da033db56700fbdb3be5d90cea56a0c2</id>
<content type='text'>
[Why]
For user regamma we're missing this function call
to combine user regamma + OS for GAMMA_CS_TFM_1D type.

[How]
Applied 1D LUT in the mod_color_build_user_regamma.
And Set the regamma dirty as updateGamma.

Signed-off-by: Derek Lai &lt;Derek.Lai@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
