<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/modules, branch v6.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-04-18T21:20:00Z</updated>
<entry>
<title>drm/amd/display: fix a divided-by-zero error</title>
<updated>2023-04-18T21:20:00Z</updated>
<author>
<name>Alex Hung</name>
<email>alex.hung@amd.com</email>
</author>
<published>2023-04-03T09:45:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0b5dfe12755f87ec014bb4cc1930485026167430'/>
<id>urn:sha1:0b5dfe12755f87ec014bb4cc1930485026167430</id>
<content type='text'>
[Why &amp; How]

timing.dsc_cfg.num_slices_v can be zero and it is necessary to check
before using it.

This fixes the error "divide error: 0000 [#1] PREEMPT SMP NOPTI".

Reviewed-by: Aurabindo Pillai &lt;Aurabindo.Pillai@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/display: remove unused _calculate_degamma_curve function</title>
<updated>2023-02-16T03:24:26Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2023-02-14T12:14:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9a13ff8f52dde1345f2e98468ce74fbb3be82970'/>
<id>urn:sha1:9a13ff8f52dde1345f2e98468ce74fbb3be82970</id>
<content type='text'>
We don't use this function anywhere, therefore, remove it.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: unset initial value for tf since it's never used</title>
<updated>2023-02-16T03:24:20Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2023-02-14T12:14:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=af54167d2b35be289a6aa98c0ebbb9bc38a1bdce'/>
<id>urn:sha1:af54167d2b35be289a6aa98c0ebbb9bc38a1bdce</id>
<content type='text'>
In mod_color_calculate_{degamma/regamma}_params(), a tf variable is
initialized as TRANSFER_FUNCTION_SRGB but tf is only used after tf =
input-&gt;tf, therefore, better to just remove this initial value and avoid
misleading interpretations.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: camel case cleanup in color_gamma file</title>
<updated>2023-02-16T03:24:15Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2023-02-14T12:14:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6ff387e889c48e0380e41ac6a5b06c71380110cd'/>
<id>urn:sha1:6ff387e889c48e0380e41ac6a5b06c71380110cd</id>
<content type='text'>
Rename mapUserRamp to map_user_ramp and doClamping to do_clamping

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix FreeSync active bit issue</title>
<updated>2023-02-14T21:06:10Z</updated>
<author>
<name>Leo (Hanghong) Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2023-02-01T21:51:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6cfb6df2d645c00513ecf17832928e08979fa953'/>
<id>urn:sha1:6cfb6df2d645c00513ecf17832928e08979fa953</id>
<content type='text'>
[Why]
The FreeSync active bit unconditionally set in HDMI VSIF.

[How]
Set this bit to true when FAMS is enable on desktop.

Reviewed-by: Felipe Clark &lt;felipe.clark@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Leo (Hanghong) Ma &lt;hanghong.ma@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable Freesync over PCon</title>
<updated>2023-01-31T19:00:44Z</updated>
<author>
<name>Sung Joon Kim</name>
<email>sungkim@amd.com</email>
</author>
<published>2023-01-12T15:38:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5b49da02ddbe1b9082cfc9be1cd848375da178ea'/>
<id>urn:sha1:5b49da02ddbe1b9082cfc9be1cd848375da178ea</id>
<content type='text'>
[why]
Enable Freesync over PCon on Linux environment.

[how]
Adding Freesync over PCon support in amdgpu_dm
- Read DPCD for Freesync over PCon capabilitiy
- Add whitelist for compatible branch devices

Reviewed-by: Chao-kai Wang &lt;Stylon.Wang@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Sung Joon Kim &lt;sungkim@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Pass DSC slice height to PSR FW</title>
<updated>2023-01-24T18:26:25Z</updated>
<author>
<name>Robin Chen</name>
<email>robin.chen@amd.com</email>
</author>
<published>2023-01-10T08:53:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c84ff24a77fa66aaf7c591cdf806456dcb5c2fcd'/>
<id>urn:sha1:c84ff24a77fa66aaf7c591cdf806456dcb5c2fcd</id>
<content type='text'>
[Why]
When DSC is enabled, the PSRSU seletive update region
must be multiple number of DSC slice height number.
The original solution is to overwrite the SU Y granularity
by DSC slice height in DAL driver. However, the size
of the SU Y granularity variable only has 8 bytes
and the DSC slice height may over the 8 bytes size.

[How]
Instead of overwriting the SU Y granularity value,
add a new DSC slice height pararmeter and pass it
to DMUB PSRSU FW. The PSRSU FW will refer to the
DSC slice height value and extend the SU region.

Reviewed-by: Dennis Chan &lt;dennis.chan@amd.com&gt;
Reviewed-by: ChunTao Tso &lt;chuntao.tso@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Robin Chen &lt;robin.chen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable AdaptiveSync in DC interface</title>
<updated>2023-01-24T18:26:25Z</updated>
<author>
<name>Sung Joon Kim</name>
<email>sungjoon.kim@amd.com</email>
</author>
<published>2023-01-11T18:12:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e95afc1cf7c66e010ef47a0df729f1baf3199671'/>
<id>urn:sha1:e95afc1cf7c66e010ef47a0df729f1baf3199671</id>
<content type='text'>
[why]
Start enabling AdaptiveSync feature on Linux environment.

[how]
Adding AdaptiveSync support in DC layer
- building AdaptiveSync info_packets
- adjusting the v_startup parameter

Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Sung Joon Kim &lt;sungjoon.kim@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: set active bit for desktop with VSDBv3</title>
<updated>2023-01-17T20:39:58Z</updated>
<author>
<name>Dillon Varone</name>
<email>Dillon.Varone@amd.com</email>
</author>
<published>2022-12-20T19:18:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=689008e11fcbc0762f4c2eff97db8f4518451474'/>
<id>urn:sha1:689008e11fcbc0762f4c2eff97db8f4518451474</id>
<content type='text'>
When using freesync on desktop, need to set freesync active bit for AMD
VSDBv3 infopacket.

Tested-by: Daniel Wheeler &lt;Daniel.Wheeler@amd.com&gt;
Reviewed-by: Martin Leung &lt;Martin.Leung@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Dillon Varone &lt;Dillon.Varone@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove unused code</title>
<updated>2023-01-17T20:39:50Z</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2023-01-03T21:13:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2eb82aaa587c4bb0377985fb1c620e1bb55252a7'/>
<id>urn:sha1:2eb82aaa587c4bb0377985fb1c620e1bb55252a7</id>
<content type='text'>
Remove some code that is never used from freesync file.

Tested-by: Daniel Wheeler &lt;Daniel.Wheeler@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
