<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display, branch v5.4</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.4</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.4'/>
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<updated>2019-11-20T23:40:21Z</updated>
<entry>
<title>Revert "drm/amd/display: enable S/G for RAVEN chip"</title>
<updated>2019-11-20T23:40:21Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-11-15T15:26:52Z</published>
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<id>urn:sha1:a0184d71163aab258d73141a8839675d6cbdcf40</id>
<content type='text'>
This reverts commit 1c4259159132ae4ceaf7c6db37a6cf76417f73d9.

S/G display is not stable with the IOMMU enabled on some
platforms.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205523
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: setting the DIG_MODE to the correct value."</title>
<updated>2019-11-06T20:32:19Z</updated>
<author>
<name>Zhan Liu</name>
<email>Zhan.Liu@amd.com</email>
</author>
<published>2019-11-04T19:46:56Z</published>
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<id>urn:sha1:a85a64d39a26704800e602f8487a27cbc5257d6c</id>
<content type='text'>
This reverts commit 385857adb8154563840e5b0f200254126618f464.

Reason for revert: Root cause of this issue is found. The workaround is not needed anymore.

Signed-off-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14</title>
<updated>2019-11-06T20:31:19Z</updated>
<author>
<name>Zhan Liu</name>
<email>zhan.liu@amd.com</email>
</author>
<published>2019-11-02T01:10:17Z</published>
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<id>urn:sha1:f9686ceedc0a04a3309e02195184c1779f602699</id>
<content type='text'>
[Why]
Navi10 has 6 PHY, but Navi14 only has 5 PHY, that is
because there is no ENGINE_ID_DIGD in Navi14. Without
this patch, many HDMI related issues (e.g. HDMI S3
resume failure, HDMI pink screen on boot) will be
observed.

[How]
If "eng_id" is larger than ENGINE_ID_DIGD, then
add "eng_id" by 1.

Signed-off-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable -msse2 for GCC 7.1+ users</title>
<updated>2019-10-30T15:56:20Z</updated>
<author>
<name>Nick Desaulniers</name>
<email>ndesaulniers@google.com</email>
</author>
<published>2019-10-16T23:02:09Z</published>
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<id>urn:sha1:e8a170ff9a3576730e43c0dbdd27b7cd3dc56848</id>
<content type='text'>
A final attempt at enabling sse2 for GCC users.

Orininally attempted in:
commit 10117450735c ("drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines")

Reverted due to "reported instability" in:
commit 193392ed9f69 ("Revert "drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines"")

Re-added just for Clang in:
commit 0f0727d971f6 ("drm/amd/display: readd -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines")

The original report didn't have enough information to know if the GPF
was due to misalignment, but I suspect that it was. (The missing
information was the disassembly of the function at the bottom of the
trace, to see if the instruction pointer pointed to an instruction with
16B alignment memory operand requirements.  The stack trace does show
the stack was only 8B but not 16B aligned though, which makes this a
strong possibility).

Now that the stack misalignment issue has been fixed for users of GCC
7.1+, reattempt adding -msse2. This matches Clang.

It will likely never be safe to enable this for pre-GCC 7.1 AND use a
16B aligned stack in these translation units.

This is only a functional change for GCC 7.1+ users, and should be boot
tested.

Link: https://bugs.freedesktop.org/show_bug.cgi?id=109487
Signed-off-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix stack alignment ABI mismatch for GCC 7.1+</title>
<updated>2019-10-30T15:56:20Z</updated>
<author>
<name>Nick Desaulniers</name>
<email>ndesaulniers@google.com</email>
</author>
<published>2019-10-16T23:02:08Z</published>
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<id>urn:sha1:00db297106e81770e7c4319014a67896053b5a22</id>
<content type='text'>
GCC earlier than 7.1 errors when compiling code that makes use of
`double`s and sets a stack alignment outside of the range of [2^4-2^12]:

$ cat foo.c
double foo(double x, double y) {
  return x + y;
}
$ gcc-4.9 -mpreferred-stack-boundary=3 foo.c
error: -mpreferred-stack-boundary=3 is not between 4 and 12

This is likely why the AMDGPU driver was ever compiled with a different
stack alignment (and thus different ABI) than the rest of the x86
kernel. The kernel uses 8B stack alignment, while the driver was using
16B stack alignment in a few places.

Since GCC 7.1+ doesn't error, fix the ABI mismatch for users of newer
versions of GCC.

There was discussion about whether to mark the driver broken or not for
users of GCC earlier than 7.1, but since the driver currently is
working, don't explicitly break the driver for them here.

Relying on differing stack alignment is unspecified behavior, and
brittle, and may break in the future.

This patch is no functional change for GCC users earlier than 7.1. It's
been compile tested on GCC 4.9 and 8.3 to check the correct flags. It
should be boot tested when built with GCC 7.1+.

-mincoming-stack-boundary= or -mstackrealign may help keep this code
building for pre-GCC 7.1 users.

The version check for GCC is broken into two conditionals, both because
cc-ifversion is currently GCC specific, and it simplifies a subsequent
patch.

Signed-off-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix stack alignment ABI mismatch for Clang</title>
<updated>2019-10-30T15:56:20Z</updated>
<author>
<name>Nick Desaulniers</name>
<email>ndesaulniers@google.com</email>
</author>
<published>2019-10-16T23:02:07Z</published>
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<id>urn:sha1:c868868f6b6a5272350781f9a19b3a5ba1c00b02</id>
<content type='text'>
The x86 kernel is compiled with an 8B stack alignment via
`-mpreferred-stack-boundary=3` for GCC since 3.6-rc1 via
commit d9b0cde91c60 ("x86-64, gcc: Use -mpreferred-stack-boundary=3 if supported")
or `-mstack-alignment=8` for Clang. Parts of the AMDGPU driver are
compiled with 16B stack alignment.

Generally, the stack alignment is part of the ABI. Linking together two
different translation units with differing stack alignment is dangerous,
particularly when the translation unit with the smaller stack alignment
makes calls into the translation unit with the larger stack alignment.
While 8B aligned stacks are sometimes also 16B aligned, they are not
always.

Multiple users have reported General Protection Faults (GPF) when using
the AMDGPU driver compiled with Clang. Clang is placing objects in stack
slots assuming the stack is 16B aligned, and selecting instructions that
require 16B aligned memory operands.

At runtime, syscall handlers with 8B aligned stack call into code that
assumes 16B stack alignment.  When the stack is a multiple of 8B but not
16B, these instructions result in a GPF.

Remove the code that added compatibility between the differing compiler
flags, as it will result in runtime GPFs when built with Clang. Cleanups
for GCC will be sent in later patches in the series.

Link: https://github.com/ClangBuiltLinux/linux/issues/735
Debugged-by: Yuxuan Shui &lt;yshuiv7@gmail.com&gt;
Reported-by: Shirish S &lt;shirish.s@amd.com&gt;
Reported-by: Yuxuan Shui &lt;yshuiv7@gmail.com&gt;
Suggested-by: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Signed-off-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>dc.c:use kzalloc without test</title>
<updated>2019-10-30T15:56:16Z</updated>
<author>
<name>zhongshiqi</name>
<email>zhong.shiqi@zte.com.cn</email>
</author>
<published>2019-10-23T08:32:23Z</published>
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<id>urn:sha1:364593f3ee5fdefc6efd89475e1804c928b4e6ba</id>
<content type='text'>
dc.c:583:null check is needed after using kzalloc function

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: zhongshiqi &lt;zhong.shiqi@zte.com.cn&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: setting the DIG_MODE to the correct value.</title>
<updated>2019-10-30T15:56:16Z</updated>
<author>
<name>Zhan liu</name>
<email>zhan.liu@amd.com</email>
</author>
<published>2019-10-17T18:55:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=385857adb8154563840e5b0f200254126618f464'/>
<id>urn:sha1:385857adb8154563840e5b0f200254126618f464</id>
<content type='text'>
[Why]
This patch is for fixing Navi14 HDMI display pink screen issue.

[How]
Call stream-&gt;link-&gt;link_enc-&gt;funcs-&gt;setup twice. This is setting
the DIG_MODE to the correct value after having been overridden by
the call to transmitter control.

Signed-off-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Passive DP-&gt;HDMI dongle detection fix</title>
<updated>2019-10-30T15:56:16Z</updated>
<author>
<name>Michael Strauss</name>
<email>michael.strauss@amd.com</email>
</author>
<published>2019-10-03T15:54:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bc2fde42e2418808dbfc04de1a6da91d7d31cf1a'/>
<id>urn:sha1:bc2fde42e2418808dbfc04de1a6da91d7d31cf1a</id>
<content type='text'>
[WHY]
i2c_read is called to differentiate passive DP-&gt;HDMI and DP-&gt;DVI-D dongles
The call is expected to fail in DVI-D case but pass in HDMI case
Some HDMI dongles have a chance to fail as well, causing misdetection as DVI-D

[HOW]
Retry i2c_read to ensure failed result is valid

Signed-off-by: Michael Strauss &lt;michael.strauss@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add 50us buffer as WA for pstate switch in active</title>
<updated>2019-10-30T15:56:15Z</updated>
<author>
<name>Jun Lei</name>
<email>Jun.Lei@amd.com</email>
</author>
<published>2019-09-19T21:43:45Z</published>
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<id>urn:sha1:7c37d399c2b84d4b79de4d512a38373f1d71ab90</id>
<content type='text'>
Signed-off-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
