<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display, branch v5.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-05-27T22:13:14Z</updated>
<entry>
<title>drm/amd/display: Fix potential integer wraparound resulting in a hang</title>
<updated>2020-05-27T22:13:14Z</updated>
<author>
<name>Aric Cyr</name>
<email>aric.cyr@amd.com</email>
</author>
<published>2020-05-12T15:48:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4e5183200d9b66695c754ef214933402056e7b95'/>
<id>urn:sha1:4e5183200d9b66695c754ef214933402056e7b95</id>
<content type='text'>
[Why]
If VUPDATE_END is before VUPDATE_START the delay calculated can become
very large, causing a soft hang.

[How]
Take the absolute value of the difference between START and END.

Signed-off-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/display: drop cursor position check in atomic test</title>
<updated>2020-05-27T22:12:32Z</updated>
<author>
<name>Simon Ser</name>
<email>contact@emersion.fr</email>
</author>
<published>2020-05-23T11:53:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f7d5991b92ff824798693ddf231cf814c9d5a88b'/>
<id>urn:sha1:f7d5991b92ff824798693ddf231cf814c9d5a88b</id>
<content type='text'>
get_cursor_position already handles the case where the cursor has
negative off-screen coordinates by not setting
dc_cursor_position.enabled.

Signed-off-by: Simon Ser &lt;contact@emersion.fr&gt;
Fixes: 626bf90fe03f ("drm/amd/display: add basic atomic check for cursor plane")
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/display: Defer cursor lock until after VUPDATE</title>
<updated>2020-05-20T21:32:13Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2020-05-04T20:49:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=31ecebee9c36d5e5e113a357a655d993fa916174'/>
<id>urn:sha1:31ecebee9c36d5e5e113a357a655d993fa916174</id>
<content type='text'>
[Why]
We dropped the delay after changed the cursor functions locking the
entire pipe to locking just the CURSOR registers to fix page flip
stuttering - this introduced cursor stuttering instead, and an underflow
issue.

The cursor update can be delayed indefinitely if the cursor update
repeatedly happens right around VUPDATE.

The underflow issue can happen if we do a viewport update on a pipe
on the same frame where a cursor update happens around VUPDATE - the
old cursor registers are retained which can be in an invalid position.

This can cause a pipe hang and indefinite underflow.

[How]
The complex, ideal solution to the problem would be a software
triple buffering mechanism from the DM layer to program only one cursor
update per frame just before VUPDATE.

The simple workaround until we have that infrastructure in place is
this change - bring back the delay until VUPDATE before locking, but
with some corrections to the calculations.

This didn't work for all timings before because the calculation for
VUPDATE was wrong - it was using the offset from VSTARTUP instead and
didn't correctly handle the case where VUPDATE could be in the back
porch.

Add a new hardware sequencer function to use the existing helper to
calculate the real VUPDATE start and VUPDATE end - VUPDATE can last
multiple lines after all.

Change the udelay to incorporate the width of VUPDATE as well.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove dml_common_def file</title>
<updated>2020-05-20T21:25:43Z</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2020-04-24T13:53:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5aa82e35cacfdff7278b7eeffd9575e9c386289e'/>
<id>urn:sha1:5aa82e35cacfdff7278b7eeffd9575e9c386289e</id>
<content type='text'>
During the rework for removing the FPU issues, I found the following
warning:

 [..] dml_common_defs.o: warning: objtool: dml_round()+0x9: FPU
      instruction outside of kernel_fpu_{begin,end}()

This file has a single function that does not need to be in a specific
file. This commit drop dml_common_defs file, and move dml_round function
to dml_inline_defs.

CC: Christian König &lt;christian.koenig@amd.com&gt;
CC: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
CC: Peter Zijlstra &lt;peterz@infradead.org&gt;
CC: Tony Cheng &lt;tony.cheng@amd.com&gt;
CC: Harry Wentland &lt;hwentlan@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: DP training to set properly SCRAMBLING_DISABLE</title>
<updated>2020-05-20T21:23:51Z</updated>
<author>
<name>Vladimir Stempen</name>
<email>vladimir.stempen@amd.com</email>
</author>
<published>2020-04-28T17:04:35Z</published>
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<id>urn:sha1:b6ef55ccba7ed00fc10e3e6f619c8f886162427f</id>
<content type='text'>
[Why]
DP training sequence to set SCRAMBLING_DISABLE bit properly based on
training pattern - per DP Spec.

[How]
Update dpcd_pattern.v1_4.SCRAMBLING_DISABLE with 1 for TPS1, TPS2, TPS3,
but not for TPS4.

Signed-off-by: Vladimir Stempen &lt;vladimir.stempen@amd.com&gt;
Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: Update update_config() logic</title>
<updated>2020-05-12T12:40:06Z</updated>
<author>
<name>Leo (Hanghong) Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2020-05-08T18:18:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=650e723cecf2738dee828564396f3239829aba83'/>
<id>urn:sha1:650e723cecf2738dee828564396f3239829aba83</id>
<content type='text'>
[Why]
For MST case: when update_config is called to disable a stream,
this clears the settings for all the streams on that link.
We should only clear the settings for the stream that was disabled.

[How]
Clear the settings after the call to remove display is called.

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Leo (Hanghong) Ma &lt;hanghong.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add basic atomic check for cursor plane</title>
<updated>2020-05-08T20:15:02Z</updated>
<author>
<name>Simon Ser</name>
<email>contact@emersion.fr</email>
</author>
<published>2020-03-30T09:23:21Z</published>
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<id>urn:sha1:626bf90fe03fa080d8df06bb0397c95c53ae8e27</id>
<content type='text'>
This patch adds a basic cursor check when an atomic test-only commit is
performed. The position and size of the cursor plane is checked.

This should fix user-space relying on atomic checks to assign buffers to
planes.

Signed-off-by: Simon Ser &lt;contact@emersion.fr&gt;
Reported-by: Roman Gilg &lt;subdiff@gmail.com&gt;
References: https://github.com/emersion/libliftoff/issues/46
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Harry Wentland &lt;hwentlan@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/display: Fix vblank and pageflip event handling for FreeSync</title>
<updated>2020-05-08T20:11:56Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2020-05-06T19:47:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2346ef47e871536cf4e36b77859bfdeb39b49024'/>
<id>urn:sha1:2346ef47e871536cf4e36b77859bfdeb39b49024</id>
<content type='text'>
[Why]
We're sending the drm vblank event a frame too early in the case where
the pageflip happens close to VUPDATE and ends up blocking the signal.

The implementation in DM was previously correct *before* we started
sending vblank events from VSTARTUP unconditionally to handle cases
where HUBP was off, OTG was ON and userspace was still requesting some
DRM planes enabled. As part of that patch series we dropped VUPDATE
since it was deemed close enough to VSTARTUP, but there's a key
difference betweeen VSTARTUP and VUPDATE - the VUPDATE signal can be
blocked if we're holding the pipe lock.

There was a fix recently to revert the unconditional behavior for the
DCN VSTARTUP vblank event since it was sending the pageflip event on
the wrong frame - once again, due to blocking VUPDATE and having the
address start scanning out two frames later.

The problem with this fix is it didn't update the logic that calls
drm_crtc_handle_vblank(), so the timestamps are totally bogus now.

[How]
Essentially reverts most of the original VSTARTUP series but retains
the behavior to send back events when active planes == 0.

Some refactoring/cleanup was done to not have duplicated code in both
the handlers.

Fixes: 16f17eda8bad ("drm/amd/display: Send vblank and user events at vsartup for DCN")
Fixes: 3a2ce8d66a4b ("drm/amd/display: Disable VUpdate interrupt for DCN hardware")
Fixes: 2b5aed9ac3f7 ("drm/amd/display: Fix pageflip event race condition for DCN.")

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-and-Tested-by: Mario Kleiner &lt;mario.kleiner.de@gmail.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 5.6.x
</content>
</entry>
<entry>
<title>drm/amd/display: Prevent dpcd reads with passive dongles</title>
<updated>2020-05-05T20:13:57Z</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2020-04-22T18:37:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e6142dd511425cb827b5db869f489eb81f5f994d'/>
<id>urn:sha1:e6142dd511425cb827b5db869f489eb81f5f994d</id>
<content type='text'>
[why]
During hotplug, a DP port may be connected to the sink through
passive adapter which does not support DPCD reads. Issuing reads
without checking for this condition will result in errors

[how]
Ensure the link is in aux_mode before initiating operation that result
in a DPCD read.

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix counter in wait_for_no_pipes_pending</title>
<updated>2020-05-05T20:13:15Z</updated>
<author>
<name>Roman Li</name>
<email>roman.li@amd.com</email>
</author>
<published>2020-02-26T22:30:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=80797dd6f1a525d1160c463d6a9f9d29af182cbb'/>
<id>urn:sha1:80797dd6f1a525d1160c463d6a9f9d29af182cbb</id>
<content type='text'>
[Why]
Wait counter is not being reset for each pipe.

[How]
Move counter reset into pipe loop scope.

Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Reviewed-by: Zhan Liu &lt;Zhan.Liu@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
