<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/amd_pcie.h, branch v6.2</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.2</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.2'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-01-21T14:54:56Z</updated>
<entry>
<title>drm/amdgpu:Add pcie gen5 support in pcie capability.</title>
<updated>2021-01-21T14:54:56Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2021-01-19T09:46:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2b3a1f515fe1fc01c2359facfaae9fc44dda3a41'/>
<id>urn:sha1:2b3a1f515fe1fc01c2359facfaae9fc44dda3a41</id>
<content type='text'>
Add PCIE_SPEED_32_0GT and PCIE GEN5 support for amdgpu.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: update amd_pcie.h to include gen4 speeds</title>
<updated>2018-07-05T21:39:59Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-06-25T18:03:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4976f1c8ccff0d682176851692976e3bf03267d6'/>
<id>urn:sha1:4976f1c8ccff0d682176851692976e3bf03267d6</id>
<content type='text'>
Internal header used by the driver to specify pcie gen
speeds of the asic and chipset.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: change pcie_gen_cap magic code to macro</title>
<updated>2016-07-07T19:01:59Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2016-06-22T05:49:48Z</published>
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<id>urn:sha1:d1371f8c5de8e1f47db59f5bea7f541687fb5eff</id>
<content type='text'>
This patch changes pcie_gen_cap magic code to macro to make it more
readable.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Cc: Eric Huang &lt;JinHuiEric.Huang@amd.com&gt;
Cc: Ken Wang &lt;Qingqing.Wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: extract pcie helpers to common header</title>
<updated>2015-12-21T21:42:30Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-11-12T01:18:52Z</published>
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<id>urn:sha1:16881da6c0b9db5fca95b96b0f02720e94c92629</id>
<content type='text'>
These will be used by multiple powerplay drivers and
other IP modules.

Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
