<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/amd_shared.h, branch v4.11</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.11</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.11'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-01-27T16:13:14Z</updated>
<entry>
<title>drm/amdgpu: extend profiling mode.</title>
<updated>2017-01-27T16:13:14Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2017-01-06T05:32:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=570272d2296ce42b7d0b4c5afa5b668100930507'/>
<id>urn:sha1:570272d2296ce42b7d0b4c5afa5b668100930507</id>
<content type='text'>
in profiling mode, powerplay will fix power state
as stable as possible.and disable gfx cg and LBPW feature.

profile_standard: as a prerequisite, ensure power and thermal
sustainable, set clocks ratio as close to the highest clock
ratio as possible.
profile_min_sclk: fix mclk as profile_normal, set lowest sclk
profile_min_mclk: fix sclk as profile_normal, set lowest mclk
profile_peak: set highest sclk and mclk, power and thermal not
sustainable
profile_exit: exit profile mode. enable gfx cg/lbpw feature.

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: introduce an interface to get clock gating status dynamically</title>
<updated>2017-01-27T16:13:06Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2017-01-05T10:44:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6cb2d4e4f3b1f0857c720ab8c41a764f18995377'/>
<id>urn:sha1:6cb2d4e4f3b1f0857c720ab8c41a764f18995377</id>
<content type='text'>
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: add profiling mode in dpm level</title>
<updated>2017-01-27T16:12:57Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-12-23T07:24:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3bd58979648fd105258934fb9f0fea1d73341d08'/>
<id>urn:sha1:3bd58979648fd105258934fb9f0fea1d73341d08</id>
<content type='text'>
In some case, App need to run under max stable clock.
so export profiling mode: GFX CG was disabled.
and user can select the max stable clock of the device.

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: Unify dpm level defines</title>
<updated>2017-01-27T16:12:53Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-12-23T06:39:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e5d03ac2b8bd6d738c8e1ed6ea9a6a164ce86d3c'/>
<id>urn:sha1:e5d03ac2b8bd6d738c8e1ed6ea9a6a164ce86d3c</id>
<content type='text'>
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: extend smu's response timeout time.</title>
<updated>2017-01-06T22:08:37Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-12-21T09:44:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=70fd80d6f7e37bf637331c682fafcce1112750ac'/>
<id>urn:sha1:70fd80d6f7e37bf637331c682fafcce1112750ac</id>
<content type='text'>
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: add Polaris12 support (v3)</title>
<updated>2017-01-06T22:07:54Z</updated>
<author>
<name>Junwei Zhang</name>
<email>Jerry.Zhang@amd.com</email>
</author>
<published>2016-12-14T20:32:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c4642a479fac9f5c224ff7425d86c427b94011af'/>
<id>urn:sha1:c4642a479fac9f5c224ff7425d86c427b94011af</id>
<content type='text'>
v2: agd: squash in various fixes
v3: agd: squash in:
drm/amdgpu: remove unnecessary smc sk firmware for polaris12

Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Ken Wang  &lt;Qingqing.Wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new gfx cg flags.</title>
<updated>2016-12-15T20:16:25Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-12-09T05:27:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=398d82ccbd8b97e67d2503f09345de5d63a80c56'/>
<id>urn:sha1:398d82ccbd8b97e67d2503f09345de5d63a80c56</id>
<content type='text'>
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use same vce state definition in dpm and powerplay</title>
<updated>2016-10-25T18:38:39Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-10-12T07:13:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0d8de7ca0b01332c404d3b5877db89727618c3d0'/>
<id>urn:sha1:0d8de7ca0b01332c404d3b5877db89727618c3d0</id>
<content type='text'>
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix amdgpu_need_full_reset (v2)</title>
<updated>2016-10-14T15:51:04Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-10-13T20:07:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=da146d3b5262c1866c868b9dec1bd0f834d6ded6'/>
<id>urn:sha1:da146d3b5262c1866c868b9dec1bd0f834d6ded6</id>
<content type='text'>
IP types are not an index.  Each asic may have number and
type of IPs.  Properly check the the type rather than
using the type id as an index.

v2: fix all the IPs to not use IP type as an idx as well.

Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: add SI asics types v2</title>
<updated>2016-08-30T22:02:02Z</updated>
<author>
<name>Ken Wang</name>
<email>Qingqing.Wang@amd.com</email>
</author>
<published>2016-01-21T09:00:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=26d721c5f5f1d2b140c6df5a361dcebc8cbf090b'/>
<id>urn:sha1:26d721c5f5f1d2b140c6df5a361dcebc8cbf090b</id>
<content type='text'>
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Ken Wang &lt;Qingqing.Wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
