<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/amd_shared.h, branch v5.14</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.14</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.14'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-06-30T03:41:22Z</updated>
<entry>
<title>drm/amd/display: Enabling eDP no power sequencing with DAL feature mask</title>
<updated>2021-06-30T03:41:22Z</updated>
<author>
<name>Zhan Liu</name>
<email>zhan.liu@amd.com</email>
</author>
<published>2021-06-14T18:54:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a51482458dafb836dbf7c8ae3200ca8db7348201'/>
<id>urn:sha1:a51482458dafb836dbf7c8ae3200ca8db7348201</id>
<content type='text'>
[Why]
Sometimes, DP receiver chip power-controlled externally by an
Embedded Controller could be treated and used as eDP,
if it drives mobile display. In this case,
we shouldn't be doing power-sequencing, hence we can skip
waiting for T7-ready and T9-ready."

[How]
Added a feature mask to enable eDP no power sequencing feature.

To enable this, set 0x10 flag in amdgpu.dcfeaturemask on
Linux command line.

Signed-off-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Reviewed-by: Nikola Cornij &lt;Nikola.Cornij@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-misc-next</title>
<updated>2021-05-22T05:17:05Z</updated>
<author>
<name>Thomas Zimmermann</name>
<email>tzimmermann@suse.de</email>
</author>
<published>2021-05-22T05:17:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=304ba5dca49a21e6f4040494c669134787145118'/>
<id>urn:sha1:304ba5dca49a21e6f4040494c669134787145118</id>
<content type='text'>
Backmerging from drm/drm-next to the patches for AMD devices
for v5.14.

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add early fini callback</title>
<updated>2021-05-20T03:48:50Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2021-05-20T03:20:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e9669fb7826270bd73554208b49b6353ab3d856f'/>
<id>urn:sha1:e9669fb7826270bd73554208b49b6353ab3d856f</id>
<content type='text'>
Use it to call disply code dependent on device-&gt;drv_data
before it's set to NULL on device unplug

v5:
Move HW finilization into this callback to prevent MMIO accesses
post cpi remove.

v7:
Split kfd suspend from device exit to expdite HW related
stuff to amdgpu_pci_remove

v8:
Squash previous KFD commit into this commit to avoid compile break.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210520032057.497334-1-andrey.grodzovsky@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: add judgement when add ip blocks (v2)</title>
<updated>2021-05-13T14:46:58Z</updated>
<author>
<name>Likun GAO</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2021-04-29T06:08:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=83a0b8639185f40ab7fc9dd291a057150eb9d238'/>
<id>urn:sha1:83a0b8639185f40ab7fc9dd291a057150eb9d238</id>
<content type='text'>
Judgement whether to add an sw ip according to the harvest info.

v2: fix indentation (Alex)

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: enable DCS</title>
<updated>2021-02-09T20:27:57Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2021-02-03T10:40:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=680602d6c2d6ac850302b0cf4c03dcc6d9ea0fae'/>
<id>urn:sha1:680602d6c2d6ac850302b0cf4c03dcc6d9ea0fae</id>
<content type='text'>
Enable DCS

V1: Enable Async DCS.
V2: Add the ppfeaturemask bit to enable from the modprobe parameter.
V3:
1. add the flag to skip APU support.
2. remove the hunk for workload selection since
it doesn't impact the function.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add GFX Fine Grain Clock Gating flag</title>
<updated>2020-11-04T22:08:08Z</updated>
<author>
<name>Jinzhou.Su</name>
<email>Jinzhou.Su@amd.com</email>
</author>
<published>2020-11-03T03:39:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=adf16996362e65ce63b5b5ee628e0876d90c079f'/>
<id>urn:sha1:adf16996362e65ce63b5b5ee628e0876d90c079f</id>
<content type='text'>
Add AMD_CG_SUPPORT_GFX_FGCG for FGCG

Signed-off-by: Jinzhou.Su &lt;Jinzhou.Su@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add vangogh apu flag</title>
<updated>2020-10-27T16:01:29Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2020-10-26T12:43:41Z</published>
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<id>urn:sha1:c345c89b64914ec701a25036ecc734c0201d4a7c</id>
<content type='text'>
This patch is to add vangogh apu flag to support more kickers that
belongs vangogh series.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add Green_Sardine APU flag</title>
<updated>2020-10-07T18:44:57Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-05-15T20:32:36Z</published>
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<id>urn:sha1:d205c3cc1a6c9f49c3d07c22d7d471c13ecdaf62</id>
<content type='text'>
Will be used for Green_Sardine which is a new APU.

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/include: add PP_FEATURE_MASK comments (v3)</title>
<updated>2020-09-25T20:55:37Z</updated>
<author>
<name>Ryan Taylor</name>
<email>ryan.taylor@amd.com</email>
</author>
<published>2020-09-18T00:19:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=549750a383bf1c6a4a8ba3634c85e00e7f4585da'/>
<id>urn:sha1:549750a383bf1c6a4a8ba3634c85e00e7f4585da</id>
<content type='text'>
Documents PP_FEATURE_MASK enum.
Provides instructions on how to use ppfeaturemasks.

v2: improve enum definitions and add kernel command line parameters to
    ppfeaturemask instructions
v3: fix alignment issues

Signed-off-by: Ryan Taylor &lt;ryan.taylor@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add initial kernel documentation for the amd_ip_block_type structure. v3</title>
<updated>2020-09-22T21:37:38Z</updated>
<author>
<name>Ryan Taylor</name>
<email>Ryan.Taylor@amd.com</email>
</author>
<published>2020-09-15T21:16:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=52ef3a1a6f079727d9c66feedcadd85d4f808549'/>
<id>urn:sha1:52ef3a1a6f079727d9c66feedcadd85d4f808549</id>
<content type='text'>
Added IP block section to amdgpu.rst.
Added more documentation to amd_ip_funcs.
Created documentation for amd_ip_block_type.

v2: Provides a more detailed DOC section on IP blocks
v3: Clarifies the IP block list. Adds info on IP block enumeration.

Signed-off-by: Ryan Taylor &lt;ryan.taylor@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
