<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/amd_shared.h, branch v5.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-11-19T15:12:50Z</updated>
<entry>
<title>drm/amdgpu: add JPEG PG and CG interface</title>
<updated>2019-11-19T15:12:50Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-11-08T18:17:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=18e6d4142bbb361681f8d228beb04305b393f7e9'/>
<id>urn:sha1:18e6d4142bbb361681f8d228beb04305b393f7e9</id>
<content type='text'>
From JPEG2.0, it will use its own PG/CG

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add JPEG IP block type</title>
<updated>2019-11-19T15:12:49Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-11-08T17:44:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8d1b04a6a1dc654d36ab51211fba7af86f0940e6'/>
<id>urn:sha1:8d1b04a6a1dc654d36ab51211fba7af86f0940e6</id>
<content type='text'>
From VCN2.0, JPEG2.0 is a separated IP block.

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add DC feature mask to disable fractional pwm</title>
<updated>2019-10-25T20:50:10Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2019-10-21T18:58:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=eaf56410ccb06f4af9475b7018ec46aa022ee99e'/>
<id>urn:sha1:eaf56410ccb06f4af9475b7018ec46aa022ee99e</id>
<content type='text'>
[Why]

Some LED panel drivers might not like fractional PWM. In such cases,
backlight flickering may be observed.

[How]

Add a DC feature mask to disable fractional PWM, and associate it with
the preexisting dc_config flag.

The flag is only plumbed through the dmcu firmware, so plumb it through
the driver path as well.

To disable, add the following to the linux cmdline:
amdgpu.dcfeaturemask=0x4

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204957
Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Anthony Koo &lt;anthony.koo@amd.com&gt;
Tested-by: Lukáš Krejčí &lt;lskrejci@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: add dc feature mask for psr enablement</title>
<updated>2019-10-25T20:50:10Z</updated>
<author>
<name>Roman Li</name>
<email>Roman.Li@amd.com</email>
</author>
<published>2019-10-01T13:45:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=397a9bc588797907fda9879c2f8cfda1a436e8ce'/>
<id>urn:sha1:397a9bc588797907fda9879c2f8cfda1a436e8ce</id>
<content type='text'>
[Why]
Adding psr mask to dc features allows selectively disable/enable psr.
Current psr implementation may not work with non-pageflipping application.
Until resolved it should be disabled by default.

[How]
Add dcfeaturemask for psr enablement. Disable by default.
To enable set amdgpu.dcfeaturemask=0x8 in grub kernel command line.

Signed-off-by: Roman Li &lt;Roman.Li@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: add flag for multi-display mclk switching</title>
<updated>2019-08-23T16:33:00Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-08-22T19:17:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d99f38aed1a03f78cb7ae04d86e7fc5ac70411e3'/>
<id>urn:sha1:d99f38aed1a03f78cb7ae04d86e7fc5ac70411e3</id>
<content type='text'>
Add a dcfeaturemask flag for mclk switching.  Disable by default;
enable once the feature has seen more testing.

Set amdgpu.dcfeaturemask=2 on the kernel command line in grub
to enable this.

Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: increase the SMU msg response waiting time</title>
<updated>2019-07-11T19:37:23Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-07-03T01:21:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=617a64dc85f91c46ccf65aefbf7a4d194280a453'/>
<id>urn:sha1:617a64dc85f91c46ccf65aefbf7a4d194280a453</id>
<content type='text'>
This is expected to fix some mode1 reset failures. And this
affects SMU part only as the timeout setting for other parts
is controlled by a different macro.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: make athub pg bit configured by pg_flags</title>
<updated>2019-06-25T18:54:32Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2019-06-14T08:19:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a201b6ac20ff99e1c4b606f54874a20694e3b0c4'/>
<id>urn:sha1:a201b6ac20ff99e1c4b606f54874a20694e3b0c4</id>
<content type='text'>
The athub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar &lt;Lijo.Lazar@amd.com&gt;
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes10.1: add ip block mes10.1 (v2)</title>
<updated>2019-06-21T23:58:22Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2019-01-25T07:25:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=886f82aa7a1d5af372a449e6bcd6de579578a602'/>
<id>urn:sha1:886f82aa7a1d5af372a449e6bcd6de579578a602</id>
<content type='text'>
MES takes over the scheduling capability of GFX and SDMA,
add MES as a standalone ip.

v2: squash in updates (Alex)

Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/athub2: enable athub2 clock gating</title>
<updated>2019-06-21T02:35:29Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2019-02-13T10:43:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=367adb2ad5bd738b0899edb4825b356f810fd8d8'/>
<id>urn:sha1:367adb2ad5bd738b0899edb4825b356f810fd8d8</id>
<content type='text'>
Enable athub2 clock gating and light sleep

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add flag to support IH clock gating</title>
<updated>2019-06-21T02:25:52Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2019-02-02T07:03:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9faa494e2fcc10162f725a3bda98b627b6f50bcb'/>
<id>urn:sha1:9faa494e2fcc10162f725a3bda98b627b6f50bcb</id>
<content type='text'>
Add new flag for IH (interrupt handler) clockgating.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
