linux/drivers/gpu/drm/amd/include/asic_reg/clk, branch master
Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
https://git.shady.money/linux/atom?h=master
2026-03-11T17:58:06Z
drm/amd/display: Enable dcn42 DC clk_mgr
2026-03-11T17:58:06Z
Roman Li
Roman.Li@amd.com
2026-02-20T21:48:14Z
urn:sha1:5b880e37a89feda5185cd1875b9d1d213dc731d1
Add support for DCN 4.2 clock manager.
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: fix file permissions on some files
2022-07-13T15:25:18Z
Alex Deucher
alexander.deucher@amd.com
2022-07-12T13:22:23Z
urn:sha1:0a94608f0f7de9b1135ffea3546afe68eafef57f
Drop execute.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2085
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add cyan_skillfish asic header files
2021-09-29T21:30:00Z
Zhan Liu
zhan.liu@amd.com
2021-09-25T07:51:08Z
urn:sha1:0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3
This patch is to add cyan_skillfish asic header files.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add vangogh asic header files (v2)
2020-10-05T19:14:02Z
Huang Rui
ray.huang@amd.com
2019-10-20T00:39:44Z
urn:sha1:a5b2c10c05ef12739be9907cc35acd33dff09020
This patch is to add vangogh asic header files.
v2: squash in updates
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add Renoir registers (v3)
2019-08-29T20:52:32Z
Bhawanpreet Lakha
Bhawanpreet.Lakha@amd.com
2019-07-25T19:51:41Z
urn:sha1:b593bce59bfa25d9abbf220b6614396ccd965b1b
add registers for dcn, clk, and renoir ip offsets
v2: header cleanup (Alex)
v3: Add DPCS registers (Hersen)
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add CLK 11.0 register headers
2019-06-20T20:54:21Z
Hawking Zhang
Hawking.Zhang@amd.com
2019-03-03T03:02:58Z
urn:sha1:ae213c44506c5f68951bb01e9fd41c4a3ba0159e
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>