<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/asic_reg/mp, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-03-04T18:15:00Z</updated>
<entry>
<title>drm/amdgpu/psp: Use Indirect access address for GFX to PSP mailbox</title>
<updated>2026-03-04T18:15:00Z</updated>
<author>
<name>sguttula</name>
<email>suresh.guttula@amd.com</email>
</author>
<published>2026-02-25T08:27:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a145bbff6f53ab80757a15eba5ad2ba8e3bdc9dc'/>
<id>urn:sha1:a145bbff6f53ab80757a15eba5ad2ba8e3bdc9dc</id>
<content type='text'>
The reason the RAP is not granting access to 0x58200 is that
a dedicated RSMU slot would have to be spent for this address range,
and MPASP is close to running out of RSMU slots.

This will help to fix PSP TOC load failure during secureboot.
GFX Driver Need to use indirect access for SMN address regs.

Signed-off-by: sguttula &lt;suresh.guttula@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 9b822e26eea3899003aa8a89d5e2c4408e066e20)
</content>
</entry>
<entry>
<title>drm/amdgpu: add MP 15.0.0 headers</title>
<updated>2026-01-05T21:59:57Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-12-05T15:56:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=19eeae7600522ca873caf5d9e4d3d4593ea1c349'/>
<id>urn:sha1:19eeae7600522ca873caf5d9e4d3d4593ea1c349</id>
<content type='text'>
Add headers for MP 15.0.0.

v2: squash in updates (Alex)

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add mp v15_0_8 ip headers v4</title>
<updated>2025-12-08T18:56:31Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2025-11-02T09:51:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=22ef3af5d42b56d760722f0c62cde362cf4747f9'/>
<id>urn:sha1:22ef3af5d42b56d760722f0c62cde362cf4747f9</id>
<content type='text'>
Add header files for mp v15_0_8 register offsets
and shift masks
v2: Update mp v15_0_8 ip headers
v3: Update mp v15_0_8 ip headers
v4: Clean up registers (Alex)

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add mp v14_0_2 ip headers (v5)</title>
<updated>2024-02-14T22:15:41Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-04-19T07:49:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f00c8157b692e590eb9b25525fa5f306a44d5311'/>
<id>urn:sha1:f00c8157b692e590eb9b25525fa5f306a44d5311</id>
<content type='text'>
v1: Add mp v14_0_2 register offset and shift masks
    header files. (Hawking)
v2: Update mp v14_0_2 register offset and shift masks
    header files to RE2. (Likun)
v3: Update mp v14_0_2 register offset and shift masks
    header files to RE2.5. (Likun)
v4: Update mp v14_0_2 register offset and shift masks
    header files to RE3. (Likun)
v5: Updates (Alex)

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add C2PMSG_109/126 reg field shift/masks</title>
<updated>2023-11-03T16:18:33Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-10-27T03:53:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=38a64e3a33bb542a9929cb4d2109789bce0c6e46'/>
<id>urn:sha1:38a64e3a33bb542a9929cb4d2109789bce0c6e46</id>
<content type='text'>
Add MP0_C2PMSG_109/126 register field shift/masks
that are used to identify boot status by driver.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Le Ma &lt;le.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: add smu_13_0_6 mca dump support</title>
<updated>2023-09-20T20:24:06Z</updated>
<author>
<name>Yang Wang</name>
<email>kevinyang.wang@amd.com</email>
</author>
<published>2023-09-04T08:32:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=25396684b57f7d16306ca149c545db60b2d08dda'/>
<id>urn:sha1:25396684b57f7d16306ca149c545db60b2d08dda</id>
<content type='text'>
v1:
implement smu_v13_0_6 mca bank interface.

v2:
- remove unnecessary lock
- move MCMP1_* macros to mp_13_0_6_sh_mask.h file

Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add header files for MP 14.0.0</title>
<updated>2023-08-30T19:27:30Z</updated>
<author>
<name>Li Ma</name>
<email>li.ma@amd.com</email>
</author>
<published>2023-07-14T19:35:19Z</published>
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<id>urn:sha1:ed807f0cbfed8d7877bc5a1879330e579f095afa</id>
<content type='text'>
This patch will add header files for MP 14.0.0.

v2: updates (Alex)

Signed-off-by: Li Ma &lt;li.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mp v13_0_6 ip headers</title>
<updated>2023-03-07T19:22:41Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2022-04-24T06:34:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3e22193d8cdc0576cd2803da3cac9f4fc9222273'/>
<id>urn:sha1:3e22193d8cdc0576cd2803da3cac9f4fc9222273</id>
<content type='text'>
Add mp v13_0_6 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Le Ma &lt;Le.Ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add header files for MP 13.0.4</title>
<updated>2022-07-29T19:24:38Z</updated>
<author>
<name>Xiaojian Du</name>
<email>Xiaojian.Du@amd.com</email>
</author>
<published>2022-07-28T05:23:38Z</published>
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<id>urn:sha1:492af34c9f67ef864319d0db930c8518a04b1937</id>
<content type='text'>
This patch will add header files for MP 13.0.4.

Signed-off-by: Xiaojian Du &lt;Xiaojian.Du@amd.com&gt;
Reviewed-by: Tim Huang &lt;Tim.Huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/psp: Add C2P registers to mp_13_0_2 header</title>
<updated>2022-05-06T20:58:10Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2021-08-16T13:57:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bce04f216df40cb407243efce1beec9e8ea7815e'/>
<id>urn:sha1:bce04f216df40cb407243efce1beec9e8ea7815e</id>
<content type='text'>
Add additional registers.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
