<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/ivsrcid, branch v6.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2025-06-03T19:32:50Z</updated>
<entry>
<title>drm/amdgpu: Add userq fence support to SDMAv7.0</title>
<updated>2025-06-03T19:32:50Z</updated>
<author>
<name>Arunpravin Paneer Selvam</name>
<email>Arunpravin.PaneerSelvam@amd.com</email>
</author>
<published>2025-05-27T13:43:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e34bcf1594b59f9f63c084bf0646b19edf581adc'/>
<id>urn:sha1:e34bcf1594b59f9f63c084bf0646b19edf581adc</id>
<content type='text'>
- Add userq fence support to SDMAv7.0.
- GFX12's user fence irq src id differs from GFX11's,
  hence we need create a new irq srcid header file for GFX12.

  User fence irq src id information-
  GFX11 and SDMA6.0 - 0x43
  GFX12 and SDMA7.0 - 0x46

Signed-off-by: Arunpravin Paneer Selvam &lt;Arunpravin.PaneerSelvam@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add userq fence support to SDMAv6.0</title>
<updated>2025-05-29T14:56:58Z</updated>
<author>
<name>Arunpravin Paneer Selvam</name>
<email>Arunpravin.PaneerSelvam@amd.com</email>
</author>
<published>2024-12-30T16:54:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5ae9de5867dbf23e53d244dfd62216bec95234a8'/>
<id>urn:sha1:5ae9de5867dbf23e53d244dfd62216bec95234a8</id>
<content type='text'>
Add userq fence support to SDMAv6.0

Signed-off-by: Arunpravin Paneer Selvam &lt;Arunpravin.PaneerSelvam@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add irq source ids for VCN5_0/JPEG5_0</title>
<updated>2024-12-10T15:28:44Z</updated>
<author>
<name>Sathishkumar S</name>
<email>sathishkumar.sundararaju@amd.com</email>
</author>
<published>2024-10-18T12:35:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d1bb64651095b53572dc170982fc1c1cf92b672c'/>
<id>urn:sha1:d1bb64651095b53572dc170982fc1c1cf92b672c</id>
<content type='text'>
Add interrupt source id macros for VCN5 and JPEG5

V2: Update copyright year (Sonny)

Signed-off-by: Sathishkumar S &lt;sathishkumar.sundararaju@amd.com&gt;
Acked-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Sonny Jiang &lt;sonjiang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: Map ISP interrupts as generic IRQs</title>
<updated>2024-06-27T21:34:40Z</updated>
<author>
<name>Pratap Nirujogi</name>
<email>pratap.nirujogi@amd.com</email>
</author>
<published>2024-05-08T02:49:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0253d718a070ba109046299847fe8f3cf7568c3c'/>
<id>urn:sha1:0253d718a070ba109046299847fe8f3cf7568c3c</id>
<content type='text'>
Map ISP IH interrupts to Linux generic IRQ for ISP driver to
handle the interrupts using MFD IORESOURCE_IRQ resource.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Pratap Nirujogi &lt;pratap.nirujogi@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add irq src id definitions for VPE</title>
<updated>2023-08-31T20:33:38Z</updated>
<author>
<name>Lang Yu</name>
<email>Lang.Yu@amd.com</email>
</author>
<published>2022-05-23T02:06:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=130c47065350a34b420dc9e626ca513e695dc801'/>
<id>urn:sha1:130c47065350a34b420dc9e626ca513e695dc801</id>
<content type='text'>
The irq src id is used to route interrupts to
the corresponding handlers.

Signed-off-by: Lang Yu &lt;Lang.Yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add gfx ras poison consumption irq handling on gfx v11_0_3</title>
<updated>2023-01-17T21:11:51Z</updated>
<author>
<name>YiPeng Chai</name>
<email>YiPeng.Chai@amd.com</email>
</author>
<published>2023-01-05T06:53:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ae6f2db4d59e9f8c90cb3c2d2a954832898d0f2b'/>
<id>urn:sha1:ae6f2db4d59e9f8c90cb3c2d2a954832898d0f2b</id>
<content type='text'>
Add gfx ras poison consumption irq handling on gfx v11_0_3.

V2:
  Move ras poison consumption irq handling code of gfx
     v11_0_3 to gfx_v11_0_3.c.
V5:
  Create dedicated irq handler for RLC_GC_FED_INTERRUPT.

V6:
  Remove invalid function call.

Signed-off-by: YiPeng Chai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add irq source id definition for VCN/JPEG 4.0</title>
<updated>2022-11-17T23:08:34Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2022-10-20T09:28:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=56ea353ea49ad21dd4c14e7baa235493ec27e766'/>
<id>urn:sha1:56ea353ea49ad21dd4c14e7baa235493ec27e766</id>
<content type='text'>
Add interrupt source id macros.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn: Add vcn ras poison consumption event handling</title>
<updated>2022-05-10T21:53:13Z</updated>
<author>
<name>Mohammad Zafar Ziya</name>
<email>Mohammadzafar.ziya@amd.com</email>
</author>
<published>2022-05-07T06:09:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0ae99221f3f73ff284a1db27dcd0d80f39f5b445'/>
<id>urn:sha1:0ae99221f3f73ff284a1db27dcd0d80f39f5b445</id>
<content type='text'>
Add vcn ras poison consumption event handling

V2: Removed default poison consumption handling function cb

Signed-off-by: Mohammad Zafar Ziya &lt;Mohammadzafar.ziya@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/jpeg: add jpeg ras poison consumption handling</title>
<updated>2022-05-10T21:53:13Z</updated>
<author>
<name>Mohammad Zafar Ziya</name>
<email>Mohammadzafar.ziya@amd.com</email>
</author>
<published>2022-05-07T04:02:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7e0357fcf86c4bb237e2fbde77588549fb5af24c'/>
<id>urn:sha1:7e0357fcf86c4bb237e2fbde77588549fb5af24c</id>
<content type='text'>
Add jpeg ras poison event callback and consumption handling

V2: Removed the default poison consumption cb handle

Signed-off-by: Mohammad Zafar Ziya &lt;Mohammadzafar.ziya@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add irq sources for vcn v4_0</title>
<updated>2022-05-04T14:43:56Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2022-01-20T04:10:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=19dc81b4017baffd6e919fd71cfc8dcbd5442e15'/>
<id>urn:sha1:19dc81b4017baffd6e919fd71cfc8dcbd5442e15</id>
<content type='text'>
Add the interrupt source packet definitions for VCN4.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
