<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/kgd_pp_interface.h, branch v4.20</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.20</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.20'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-10-09T22:04:59Z</updated>
<entry>
<title>drm/amdgpu: Add fan RPM setting via sysfs</title>
<updated>2018-10-09T22:04:59Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-09-20T06:30:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c2870527f700e919fbb543baef36032be5d626e0'/>
<id>urn:sha1:c2870527f700e919fbb543baef36032be5d626e0</id>
<content type='text'>
Add fan1_target for get/set fan speed in RPM unit
Add fan1_min/fan1_max for get min, max fan speed in RPM unit
Add fan1_enable to enable/disable the fan1 sensor

v3: drop the hardcode value of min/max rpm in comments pointed
    out by Alex.
v2: query the min/max rpm gpu support instand of hardcode value.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add new AMDGPU_PP_SENSOR_MIN/MAX_FAN_RPM sensor</title>
<updated>2018-10-09T22:04:46Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-09-30T05:18:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=862cd98029d5f31db326e007aff5fec784807941'/>
<id>urn:sha1:862cd98029d5f31db326e007aff5fec784807941</id>
<content type='text'>
For getting the min/max fan speed in RPM units.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: helper interfaces for MGPU fan boost feature</title>
<updated>2018-10-09T21:59:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2018-09-27T05:43:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b55c9e7a11f9993328a46b43f3c9e4ca1962c352'/>
<id>urn:sha1:b55c9e7a11f9993328a46b43f3c9e4ca1962c352</id>
<content type='text'>
MGPU fan boost feature is enabled only when two or more dGPUs
in the system.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK sensor</title>
<updated>2018-09-27T02:09:10Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-09-21T03:16:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e0c3d04747ee162f7eff5c14b5c4526ca6b9dc74'/>
<id>urn:sha1:e0c3d04747ee162f7eff5c14b5c4526ca6b9dc74</id>
<content type='text'>
For getting the 64 bit enabled smc feature mask from vega parts.

Reviewed-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: added vega20 overdrive support V3</title>
<updated>2018-09-11T03:39:30Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2018-08-29T06:38:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d5bf26539494d16dfabbbea0854a47d202ea15c0'/>
<id>urn:sha1:d5bf26539494d16dfabbbea0854a47d202ea15c0</id>
<content type='text'>
Added vega20 overdrive support based on existing OD sysfs
APIs. However, the OD logics are simplified on vega20. So,
the behavior will be a little different and works only on
some limited levels.

V2: fix typo
    fix commit description
    revise error logs
    add support for clock OD

V3: separate clock from voltage OD settings

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: Export notify_smu_enable_pwe to display</title>
<updated>2018-07-05T21:40:00Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-06-22T06:12:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ea870e44415a5f5ed09b6e002e38d3e0de7f390e'/>
<id>urn:sha1:ea870e44415a5f5ed09b6e002e38d3e0de7f390e</id>
<content type='text'>
Display can notify smu to enable pwe after gpu suspend.
It is used in case when display resumes from S3 and wants to start
audio driver by enabling pwe

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: Refine the interface exported to display</title>
<updated>2018-07-05T21:39:57Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-06-22T10:26:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=99c5e27d3368eb92476f47530355a6f25bf486e8'/>
<id>urn:sha1:99c5e27d3368eb92476f47530355a6f25bf486e8</id>
<content type='text'>
use void * as function parameter type in order for extension.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: Unify powergate_uvd/vce/mmhub to set_powergating_by_smu</title>
<updated>2018-07-05T21:38:48Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-06-05T05:06:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b92c628712ed3a1cf5d4a144290e8ffc170bf51e'/>
<id>urn:sha1:b92c628712ed3a1cf5d4a144290e8ffc170bf51e</id>
<content type='text'>
Some HW ip blocks need call SMU to enter/leave power gate state.
So export common set_powergating_by_smu interface.

1. keep consistent with set_clockgating_by_smu
2. scales easily to powergate other ip(gfx) if necessary

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rename set_mmhub_powergating_by_smu to powergate_mmhub</title>
<updated>2018-07-05T21:38:47Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-06-05T02:07:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a8da8ff3332b1f92588d22a8a643965409d1892d'/>
<id>urn:sha1:a8da8ff3332b1f92588d22a8a643965409d1892d</id>
<content type='text'>
In order to keep consistent with powergate_uvd/vce.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pp: Print out voltage/clock range in sysfs</title>
<updated>2018-05-15T18:43:48Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-04-19T02:39:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a3c991f922f99160cb695f9d28e04cd8e818d6f9'/>
<id>urn:sha1:a3c991f922f99160cb695f9d28e04cd8e818d6f9</id>
<content type='text'>
when user cat pp_od_clk_voltage
add display info about the sclk/mclk/vddc range that user can overdrive
output as:
OD_SCLK:
0:        300MHz        900mV
1:        400MHz        912mV
2:        500MHz        925mV
3:        600MHz        937mV
4:        700MHz        950mV
5:        800MHz        975mV
6:        900MHz        987mV
7:       1000MHz       1000mV
OD_MCLK:
0:        300MHz        900mV
1:       1500MHz        912mV
OD_RANGE:
SCLK:     300MHz       1200MHz
MCLK:     300MHz       1500MHz
VDDC:     700mV        1200mV

also
1. remove unnecessary whitespace before a quoted newline
2. change unit of frequency Mhz to MHz

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
