<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include/kgd_pp_interface.h, branch v5.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-07-31T07:02:22Z</updated>
<entry>
<title>drm/amd/powerplay: add new sensor type for VCN powergate status</title>
<updated>2019-07-31T07:02:22Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-07-22T01:51:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a02709818f397e7ed7a0943d65a49d54b2752626'/>
<id>urn:sha1:a02709818f397e7ed7a0943d65a49d54b2752626</id>
<content type='text'>
VCN is widely used in new ASICs and different from tranditional
UVD and VCE.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: expose Vega20 realtime memory utilization</title>
<updated>2019-05-24T17:20:48Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-04-19T05:54:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1846e3f9e76ceaac86072eb897393ee24d1d870e'/>
<id>urn:sha1:1846e3f9e76ceaac86072eb897393ee24d1d870e</id>
<content type='text'>
Enable realtime memory utilization report on Vega20.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: support hwmon temperature channel labels V2</title>
<updated>2019-05-24T17:20:47Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-04-17T07:45:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2adc11564c42b63827eaf1cf9d61da2f79b9c978'/>
<id>urn:sha1:2adc11564c42b63827eaf1cf9d61da2f79b9c978</id>
<content type='text'>
Expose temp[1-3]_label hwmon interfaces. While temp2_label
and temp3_label are visible for SOC15 dGPUs only.

- V2: correct temp1_label as "edge"

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: expose current hotspot and memory temperatures V2</title>
<updated>2019-05-24T17:20:47Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-04-18T05:51:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a34d1166b47c8497cffda4da7c14182cb3420362'/>
<id>urn:sha1:a34d1166b47c8497cffda4da7c14182cb3420362</id>
<content type='text'>
Two new hwmon interfaces(temp2_input and temp3_input) are added.
They are supported on SOC15 dGPUs only.

- V2: correct thermal sensor output

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: support retrieving and adjusting dcefclock power levels V2</title>
<updated>2019-01-25T21:15:34Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-01-14T09:37:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d7e28e2d6b518af760c81ba578ecf4e4b0c0f401'/>
<id>urn:sha1:d7e28e2d6b518af760c81ba578ecf4e4b0c0f401</id>
<content type='text'>
User can use "pp_dpm_dcefclk" to retrieve and adjust dcefclock power
levels.

V2: expose this interface for Vega10 and later ASICs only

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: support retrieving and adjusting fclock power levels V2</title>
<updated>2019-01-25T21:15:34Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-01-14T07:44:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=828e37efe802ba8c868922af23099638fde5b7b4'/>
<id>urn:sha1:828e37efe802ba8c868922af23099638fde5b7b4</id>
<content type='text'>
User can use "pp_dpm_fclk" to retrieve and adjust fclock power
levels.

V2: expose this interface for Vega20 and later ASICs only

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: support retrieving and adjusting SOC clock power levels V2</title>
<updated>2019-01-25T21:15:34Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-01-14T06:45:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d7337ca2640cde21ff178bd78f01d94cd5ea2e08'/>
<id>urn:sha1:d7337ca2640cde21ff178bd78f01d94cd5ea2e08</id>
<content type='text'>
User can use "pp_dpm_socclk" to retrieve and adjust SOC clock power
levels.

V2: expose this interface for Vega10 and later ASICs only

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: support enabled ppfeatures retrieving and setting V3</title>
<updated>2019-01-25T21:15:34Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-01-14T06:06:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7ca881a8651bdeffd99ba8e0010160f9bf60673e'/>
<id>urn:sha1:7ca881a8651bdeffd99ba8e0010160f9bf60673e</id>
<content type='text'>
User can use "ppfeatures" sysfs interface to retrieve and set enabled
powerplay features.

V2: expose this feature for Vega10 and later dGPUs
V3: squash in removal of unused variable (Alex)

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add BACO interfaces in pm and hwmgr function table</title>
<updated>2019-01-14T20:43:01Z</updated>
<author>
<name>Jim Qu</name>
<email>Jim.Qu@amd.com</email>
</author>
<published>2018-11-05T09:45:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7451ca88d51dc9d97ea94b453450fc81494f48e0'/>
<id>urn:sha1:7451ca88d51dc9d97ea94b453450fc81494f48e0</id>
<content type='text'>
Signed-off-by: Jim Qu &lt;Jim.Qu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: support BOOTUP_DEFAULT power profile mode</title>
<updated>2019-01-14T20:04:23Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2018-12-27T06:23:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c27c9778a19e050628689d03604941c7039685a3'/>
<id>urn:sha1:c27c9778a19e050628689d03604941c7039685a3</id>
<content type='text'>
This can avoid unexpected profile mode change after running
compute workload.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
