<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include, branch v4.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2016-07-29T18:37:12Z</updated>
<entry>
<title>drm/amdgpu: add query device id and revision id into system info entry at CGS</title>
<updated>2016-07-29T18:37:12Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2016-07-12T05:54:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=09fc7eff7eed0b9f4d7353fa902b1f1a779cc990'/>
<id>urn:sha1:09fc7eff7eed0b9f4d7353fa902b1f1a779cc990</id>
<content type='text'>
This patch adds device id and revision into system info entry at CGS,
it's able to get PCI device id and revision id from amdgpu, it might
get more info in future.

PCI device id will be also used on powerplay part at current.

Suggested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new definition in bif header</title>
<updated>2016-07-29T18:37:11Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2016-07-14T16:31:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e595d7f03b48f5f311c9289c070a2a14636ad362'/>
<id>urn:sha1:e595d7f03b48f5f311c9289c070a2a14636ad362</id>
<content type='text'>
This patch adds new definition in bif header, and will be used on
iceland HW powertune part.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix incorrect type of info_id</title>
<updated>2016-07-29T18:37:09Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2016-07-16T05:24:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=11f55a3ae65d8e98c63aca7ddf3fd3b04fc37c19'/>
<id>urn:sha1:11f55a3ae65d8e98c63aca7ddf3fd3b04fc37c19</id>
<content type='text'>
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement UVD VM mode for Stoney v2</title>
<updated>2016-07-29T18:36:57Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-06-23T10:11:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0f30a397d9824cc81722d9912ae6ec9cec2b929b'/>
<id>urn:sha1:0f30a397d9824cc81722d9912ae6ec9cec2b929b</id>
<content type='text'>
Starting with Stoney we support running UVD in VM mode as well.

v2: rebased, only enable on Polaris for now.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add ucode_start_address into cgs_firmware_info</title>
<updated>2016-07-15T16:33:10Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2016-06-19T15:55:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=340efe2898f6ad5a74bbbbf8002f1196ecf1a1bf'/>
<id>urn:sha1:340efe2898f6ad5a74bbbbf8002f1196ecf1a1bf</id>
<content type='text'>
The ucode_start_address would be used on powerplay of iceland.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add read/write function for GC CAC programming</title>
<updated>2016-07-07T19:06:23Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-06-08T04:47:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ccdbb20a75e3e3917f327a185c1a45722b5d359f'/>
<id>urn:sha1:ccdbb20a75e3e3917f327a185c1a45722b5d359f</id>
<content type='text'>
Create a GC_CAC_IND_INDEX/DATA pair of funcitons to program
all the CAC registers

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: add shared definitions for di/dt feature.</title>
<updated>2016-07-07T19:06:22Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-06-08T04:52:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9a88d22bb090f39e234bec9e4d416c8acdcdbb93'/>
<id>urn:sha1:9a88d22bb090f39e234bec9e4d416c8acdcdbb93</id>
<content type='text'>
v1: delete some comflict definitions between polaris and fiji.

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove gfx8 registers that vary between asics</title>
<updated>2016-07-07T19:06:21Z</updated>
<author>
<name>Ken Wang</name>
<email>Qingqing.Wang@amd.com</email>
</author>
<published>2016-07-01T05:54:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a334bc7df010b5d427b6f37bc9db34759e372a2e'/>
<id>urn:sha1:a334bc7df010b5d427b6f37bc9db34759e372a2e</id>
<content type='text'>
those register mask definitions are different in polaris compare to
former gfx 8 gpus, so remove them from misusing.

Signed-off-by: Ken Wang &lt;Qingqing.Wang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: get number of shade engine by cgs interface.</title>
<updated>2016-07-07T19:06:20Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-06-07T12:15:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d826c982d7ab512d37f808b17e9d83f60d4b0c6d'/>
<id>urn:sha1:d826c982d7ab512d37f808b17e9d83f60d4b0c6d</id>
<content type='text'>
the num of shade engine was needed to
measure the activity of the graphics core
and to enable di/dt feature.

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay:  Unify family defines</title>
<updated>2016-07-07T19:06:19Z</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2016-07-06T14:01:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bb06d7ef99272ecf4f3d777b256cbae042888123'/>
<id>urn:sha1:bb06d7ef99272ecf4f3d777b256cbae042888123</id>
<content type='text'>
s/AMD_FAMILY_/AMDGPU_FAMILY_/

Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
