<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include, branch v5.15</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.15</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.15'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-10-05T14:17:32Z</updated>
<entry>
<title>drm/amd/display: Fix B0 USB-C DP Alt mode</title>
<updated>2021-10-05T14:17:32Z</updated>
<author>
<name>Liu, Zhan</name>
<email>Zhan.Liu@amd.com</email>
</author>
<published>2021-09-09T17:26:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466'/>
<id>urn:sha1:45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466</id>
<content type='text'>
[Why]
Starting from B0, along with RDPCSTX, RDPCSPIPE registers are also used.

[How]
Make sure RDPCSPIPE registers are programmed correctly.

Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Zhan Liu &lt;Zhan.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
(cherry picked from commit bdd1a21b52557ea8f61d0a5dc2f77151b576eb70)
</content>
</entry>
<entry>
<title>drm/amd/pm: drop the unnecessary intermediate percent-based transition</title>
<updated>2021-08-16T19:35:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-10T02:16:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0d8318e11203c2d1ec54ae9a4aad71fb0ecf9c36'/>
<id>urn:sha1:0d8318e11203c2d1ec54ae9a4aad71fb0ecf9c36</id>
<content type='text'>
Currently, the readout of fan speed pwm is transited into percent-based
and then pwm-based. However, the transition into percent-based is totally
unnecessary and make the final output less accurate.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: correct the fan speed RPM retrieving</title>
<updated>2021-08-16T19:35:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-09T04:23:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d9ca7567b864322b9fd13b0d29ed510b80bba2f0'/>
<id>urn:sha1:d9ca7567b864322b9fd13b0d29ed510b80bba2f0</id>
<content type='text'>
The relationship "PWM = RPM / smu-&gt;fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed RPM.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: correct the fan speed PWM retrieving</title>
<updated>2021-08-16T19:35:56Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-09T04:10:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fb1f667e71c079defa5918b8f457faa48120b6f1'/>
<id>urn:sha1:fb1f667e71c079defa5918b8f457faa48120b6f1</id>
<content type='text'>
The relationship "PWM = RPM / smu-&gt;fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed PWM.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: CWSR with software scheduler</title>
<updated>2021-08-11T21:19:54Z</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2021-08-09T19:52:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b53ef0df1ba8001b17da2f972cbc1f6091d1774a'/>
<id>urn:sha1:b53ef0df1ba8001b17da2f972cbc1f6091d1774a</id>
<content type='text'>
This patch adds support to program trap handler settings
when loading driver with software scheduler (sched_policy=2).

Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Suggested-by: Jay Cornwall &lt;Jay.Cornwall@amd.com&gt;
Reviewed-by: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set RAS EEPROM address from VBIOS</title>
<updated>2021-08-06T01:17:59Z</updated>
<author>
<name>John Clements</name>
<email>john.clements@amd.com</email>
</author>
<published>2021-08-04T09:11:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=14fb496a84f15c1e462c8b7ff5563154174a6c5e'/>
<id>urn:sha1:14fb496a84f15c1e462c8b7ff5563154174a6c5e</id>
<content type='text'>
update to latest atombios fw table

Signed-off-by: John Clements &lt;john.clements@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;.
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: add regCP_MEx_INT_STAT_DEBUG for Aldebaran debugging</title>
<updated>2021-08-06T01:17:59Z</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2021-03-23T16:22:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d2a266fad506aa3dc143280dcf2dd732b40bcdd3'/>
<id>urn:sha1:d2a266fad506aa3dc143280dcf2dd732b40bcdd3</id>
<content type='text'>
Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mp 11.0.8 header for cyan_skillfish</title>
<updated>2021-07-23T14:08:01Z</updated>
<author>
<name>Lang Yu</name>
<email>lang.yu@amd.com</email>
</author>
<published>2021-06-17T03:37:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2766534b766e1b12e0fa0a4e2e26929e808fde71'/>
<id>urn:sha1:2766534b766e1b12e0fa0a4e2e26929e808fde71</id>
<content type='text'>
The cyan_skillfish will use the mp 11.0.8.

Signed-off-by: Lang Yu &lt;lang.yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: dynamic initialize ip offset for cyan_skillfish</title>
<updated>2021-07-23T14:08:00Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-07-13T21:16:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=708391977be557359f7e765c4474e237238febb2'/>
<id>urn:sha1:708391977be557359f7e765c4474e237238febb2</id>
<content type='text'>
Add ip offset definition for cyan_skillfish and initialize it.

v2: squash in ip_offset updates (Alex)

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add cyan_skillfish asic type</title>
<updated>2021-07-23T14:08:00Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2021-07-13T21:13:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d0f56dc25afba6e08be2d2611d5d19f97821aa64'/>
<id>urn:sha1:d0f56dc25afba6e08be2d2611d5d19f97821aa64</id>
<content type='text'>
Add cyan_skillfish asic family.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
