<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/include, branch v5.2</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.2</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.2'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-04-23T22:27:08Z</updated>
<entry>
<title>drm/amd/include: Add HUBPREQ_DEBUG register offsets</title>
<updated>2019-04-23T22:27:08Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2019-04-16T00:57:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3b8cea6f645c909783455265f2cb0fb64fd68f51'/>
<id>urn:sha1:3b8cea6f645c909783455265f2cb0fb64fd68f51</id>
<content type='text'>
They will be used by DC when runing ASIC-specific HUBP initialization.

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include: Add USB_C_TYPE to atom_encoder_cap_defs</title>
<updated>2019-04-19T16:32:48Z</updated>
<author>
<name>Leo Li</name>
<email>sunpeng.li@amd.com</email>
</author>
<published>2019-04-16T15:32:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=20299a8812dccdd24acfaa5f935fa8d81222bf9c'/>
<id>urn:sha1:20299a8812dccdd24acfaa5f935fa8d81222bf9c</id>
<content type='text'>
This is needed by DC to support EDID emulation on USB-C ports.

CC: Samson Tam &lt;Samson.Tam@amd.com&gt;
CC: Harry Wentland &lt;harry.wentland@amd.com&gt;
CC: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: get_fw_version isn't ASIC specific</title>
<updated>2019-04-19T16:32:40Z</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2019-04-12T15:07:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0da8b10e36e91b1c68b88cdcc6efb285a3b386ed'/>
<id>urn:sha1:0da8b10e36e91b1c68b88cdcc6efb285a3b386ed</id>
<content type='text'>
Method of getting firmware version is the same across ASICs, so remove
them from ASIC-specific files and create one in amdgpu_amdkfd.c. This new
created get_fw_version simply reads fw_version from adev-&gt;gfx than parsing
the ucode header.

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove chash</title>
<updated>2019-03-19T20:36:58Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-11-07T12:55:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=04ed8459f3348f95c119569338e39294a8e02349'/>
<id>urn:sha1:04ed8459f3348f95c119569338e39294a8e02349</id>
<content type='text'>
Remove the chash implementation for now since it isn't used any more.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: update atomfirmware header with ecc related members</title>
<updated>2019-03-19T20:36:51Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2019-03-07T02:10:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ed606ca3d30d2e73d566e087214274399ca016d3'/>
<id>urn:sha1:ed606ca3d30d2e73d566e087214274399ca016d3</id>
<content type='text'>
add new umc_info structures and new firmware_capability defines

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: Add ENGINE_CNTL register to vcn10 headers</title>
<updated>2019-03-19T20:36:48Z</updated>
<author>
<name>Tom St Denis</name>
<email>tom.stdenis@amd.com</email>
</author>
<published>2019-03-04T15:58:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=054d282d179eba78012a26dbd4e4f1b231c596f1'/>
<id>urn:sha1:054d282d179eba78012a26dbd4e4f1b231c596f1</id>
<content type='text'>
Signed-off-by: Tom St Denis &lt;tom.stdenis@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: add enable_umd_pstate functions for SMU11</title>
<updated>2019-03-19T20:03:59Z</updated>
<author>
<name>Chengming Gui</name>
<email>Jack.Gui@amd.com</email>
</author>
<published>2019-01-17T09:57:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=49d27e91cf4fd817d8e554c20a496721719519d2'/>
<id>urn:sha1:49d27e91cf4fd817d8e554c20a496721719519d2</id>
<content type='text'>
add enable_umd_pstate to support sys interface for SMU11.

Signed-off-by: Chengming Gui &lt;Jack.Gui@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: update atomfirmware header for smu11</title>
<updated>2019-03-19T20:03:55Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2019-01-21T06:06:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=eaf02a4d92e7941224e0f34aa721b065dc1856d9'/>
<id>urn:sha1:eaf02a4d92e7941224e0f34aa721b065dc1856d9</id>
<content type='text'>
This patch updates atomfirmware header on smu11 for future use.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Kevin Wang &lt;Kevin1.Wang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Optimize out sdma doorbell array in kgd2kfd_shared_resources</title>
<updated>2019-02-18T23:00:50Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2019-01-10T04:31:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=234441dd49bcd917d0acd23290d1c49f332a816b'/>
<id>urn:sha1:234441dd49bcd917d0acd23290d1c49f332a816b</id>
<content type='text'>
We can directly calculate sdma doorbell indexes in the process doorbell
pages through the doorbell_index structure in amdgpu_device, so no need
to cache them in kgd2kfd_shared_resources any more. This alleviates the
adaptation needs when new SDMA configurations are introduced.

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Fix bugs regarding CP queue doorbell mask on SOC15</title>
<updated>2019-02-18T23:00:41Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2019-02-13T18:15:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1f86805adc3432e92e7d87e1ff5da9826ef56eab'/>
<id>urn:sha1:1f86805adc3432e92e7d87e1ff5da9826ef56eab</id>
<content type='text'>
Reserved doorbells for SDMA IH and VCN were not properly masked out
when allocating doorbells for CP user queues. This patch fixed that.

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
