<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/pm, branch for-next</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=for-next</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=for-next'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2025-01-10T18:30:58Z</updated>
<entry>
<title>drm/amdgpu/smu13: update powersave optimizations</title>
<updated>2025-01-10T18:30:58Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-01-08T20:17:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=11510e67d0bd956878ab4ffa03c45766788092c1'/>
<id>urn:sha1:11510e67d0bd956878ab4ffa03c45766788092c1</id>
<content type='text'>
Only apply when compute profile is selected.  This is
the only supported configuration.  Selecting other
profiles can lead to performane degradations.

Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit d477e39532d725b1cdb3c8005c689c74ffbf3b94)
Cc: stable@vger.kernel.org # 6.12.x
</content>
</entry>
<entry>
<title>drm/amd/pm:  fix BUG: scheduling while atomic</title>
<updated>2025-01-06T20:19:36Z</updated>
<author>
<name>Kun Liu</name>
<email>Kun.Liu2@amd.com</email>
</author>
<published>2024-12-27T03:43:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2a238b09bfd04e8155a7a323364bce1c38b28c0f'/>
<id>urn:sha1:2a238b09bfd04e8155a7a323364bce1c38b28c0f</id>
<content type='text'>
atomic scheduling will be triggered in interrupt handler for
AC/DC mode switch as following backtrace.
Call Trace:
 &lt;IRQ&gt;
 dump_stack_lvl
 __schedule_bug
 __schedule
 schedule
 schedule_preempt_disabled
 __mutex_lock
 smu_cmn_send_smc_msg_with_param
 smu_v13_0_irq_process
 amdgpu_irq_dispatch
 amdgpu_ih_process
 amdgpu_irq_handler
 __handle_irq_event_percpu
 handle_irq_event
 handle_edge_irq
 __common_interrupt
 common_interrupt
 &lt;/IRQ&gt;
 &lt;TASK&gt;
 asm_common_interrupt

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Kun Liu &lt;Kun.Liu2@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 03cc84b102d1a832e8dfc59344346dedcebcdf42)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/smu14.0.2: fix IP version check</title>
<updated>2024-12-18T18:01:48Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2024-12-12T22:06:26Z</published>
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<id>urn:sha1:9e752ee26c1031312a01d2afc281f5f6fdfca176</id>
<content type='text'>
Use the helper function rather than reading it directly.

Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 8f2cd1067afe68372a1723e05e19b68ed187676a)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: Set SMU v13.0.7 default workload type</title>
<updated>2024-12-05T19:31:54Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2024-12-04T07:52:10Z</published>
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<id>urn:sha1:3912a78cf72eb45f8153a395162b08fef9c5ec3d</id>
<content type='text'>
Set the default workload type to bootup type on smu v13.0.7.
This is because of the constraint on smu v13.0.7.
Gfx activity has an even higher set point on 3D fullscreen
mode than the one on bootup mode. This causes the 3D fullscreen
mode's performance is worse than the bootup mode's performance
for the lightweighted/medium workload. For the high workload,
the performance is the same between 3D fullscreen mode and bootup
mode.

v2: set the default workload in ASIC specific file

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.11.x
</content>
</entry>
<entry>
<title>drm/amd/pm: Initialize power profile mode</title>
<updated>2024-12-05T19:31:14Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2024-12-04T07:41:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8eb966f2403abb844e972fb4eb1348640111f121'/>
<id>urn:sha1:8eb966f2403abb844e972fb4eb1348640111f121</id>
<content type='text'>
Refactor such that individual SMU IP versions can choose the startup
power profile mode. If no preference, then use the generic default power
profile selection logic.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.11.x
</content>
</entry>
<entry>
<title>drm/amd/pm: fix and simplify workload handling</title>
<updated>2024-12-02T23:36:15Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2024-11-16T13:20:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1443dd3c67f6d1a8bd1f810e598e2f0c6f19205c'/>
<id>urn:sha1:1443dd3c67f6d1a8bd1f810e598e2f0c6f19205c</id>
<content type='text'>
smu-&gt;workload_mask is IP specific and should not be messed with in
the common code. The mask bits vary across SMU versions.

Move all handling of smu-&gt;workload_mask in to the backends and
simplify the code.  Store the user's preference in smu-&gt;power_profile_mode
which will be reflected in sysfs.  For internal driver profile
switches for KFD or VCN, just update the workload mask so that the
user's preference is retained.  Remove all of the extra now unused
workload related elements in the smu structure.

v2: use refcounts for workload profiles
v3: rework based on feedback from Lijo
v4: fix the refcount on failure, drop backend mask
v5: rework custom handling
v6: handle failure cleanup with custom profile
v7: Update documentation

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Cc: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Cc: stable@vger.kernel.org # 6.11.x
</content>
</entry>
<entry>
<title>Revert "drm/amd/pm: correct the workload setting"</title>
<updated>2024-12-02T23:35:57Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2024-11-16T14:22:14Z</published>
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<id>urn:sha1:c3d06a3b6acd6b8c9595d677d049555f475703df</id>
<content type='text'>
This reverts commit 74e1006430a5377228e49310f6d915628609929e.

This causes a regression in the workload selection.
A more extensive fix is being worked on.
For now, revert.

This came back after a merge in 6.13-rc1, so revert again.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3618
Fixes: 74e1006430a5 ("drm/amd/pm: correct the workload setting")
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 44f392fbf628a7ff2d8bb8e83ca1851261f81a6f)
</content>
</entry>
<entry>
<title>drm/amd/pm: Remove arcturus min power limit</title>
<updated>2024-11-21T20:56:06Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2024-11-20T03:04:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=da868898cf4c5ddbd1f7406e356edce5d7211eb5'/>
<id>urn:sha1:da868898cf4c5ddbd1f7406e356edce5d7211eb5</id>
<content type='text'>
As per power team, there is no need to impose a lower bound on arcturus
power limit. Any unreasonable limit set will result in frequent
throttling.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: skip setting the power source on smu v14.0.2/3</title>
<updated>2024-11-21T20:55:58Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2024-11-19T07:03:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=76c7f08094767b5df3b60e18d1bdecddd4a5c844'/>
<id>urn:sha1:76c7f08094767b5df3b60e18d1bdecddd4a5c844</id>
<content type='text'>
skip setting power source on smu v14.0.2/3

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.11.x
</content>
</entry>
<entry>
<title>drm/amd/pm: disable pcie speed switching on Intel platform for smu v14.0.2/3</title>
<updated>2024-11-21T20:55:40Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2024-11-19T06:26:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b0df0e777874549c128b43f7bf4989a2ed24b37a'/>
<id>urn:sha1:b0df0e777874549c128b43f7bf4989a2ed24b37a</id>
<content type='text'>
disable pcie speed switching on Intel platform for smu v14.0.2/3
based on Intel's requirement.
v2: align the setting with smu v13.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.11.x
</content>
</entry>
</feed>
