<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/pm, branch v5.12</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.12</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.12'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-04-08T04:36:40Z</updated>
<entry>
<title>drm/amdgpu/smu7: fix CAC setting on TOPAZ</title>
<updated>2021-04-08T04:36:40Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-04-07T13:28:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cdcc108a2aced5f9cbc45920e29bf49819e5477f'/>
<id>urn:sha1:cdcc108a2aced5f9cbc45920e29bf49819e5477f</id>
<content type='text'>
We need to enable MC CAC for mclk switching to work.

Fixes: d765129a719f ("drm/amd/pm: correct sclk/mclk dpm enablement")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1561
Tested-by: Konstantin Kharlamov &lt;Hi-Angel@yandex.ru&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/vangogh: don't check for dpm in is_dpm_running when in suspend</title>
<updated>2021-04-01T01:53:38Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-03-26T20:56:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6951c3e4a260f65a16433833d2511e8796dc8625'/>
<id>urn:sha1:6951c3e4a260f65a16433833d2511e8796dc8625</id>
<content type='text'>
Do the same thing we do for Renoir.  We can check, but since
the sbios has started DPM, it will always return true which
causes the driver to skip some of the SMU init when it shouldn't.

Reviewed-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: no need to force MCLK to highest when no display connected</title>
<updated>2021-03-29T18:05:20Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-03-23T08:30:38Z</published>
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<id>urn:sha1:acc7baafeb0b52a5b91be64c4776f827a163dda1</id>
<content type='text'>
Correct the check for vblank short.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Tested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: workaround for audio noise issue</title>
<updated>2021-03-23T13:34:26Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2021-03-11T04:19:57Z</published>
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<id>urn:sha1:9d03730ecbc5afabfda26d4dbb014310bc4ea4d9</id>
<content type='text'>
On some Intel platforms, audio noise can be detected due to
high pcie speed switch latency.
This patch leaverages ppfeaturemask to fix to the highest pcie
speed then disable pcie switching.

v2:
coding style fix

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/swsmu: skip gfx cgpg on s0ix suspend</title>
<updated>2021-03-22T19:26:42Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-03-12T21:00:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4021229e32bd9e35f2813715e056f59bb3739e7d'/>
<id>urn:sha1:4021229e32bd9e35f2813715e056f59bb3739e7d</id>
<content type='text'>
The SMU expects CGPG to be enabled when entering S0ix.
with this we can re-enable SMU suspend.

Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rework S3/S4/S0ix state handling</title>
<updated>2021-03-22T19:24:02Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-03-12T20:22:36Z</published>
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<id>urn:sha1:8914089a205be1042f99d49d2087663efc6fafa3</id>
<content type='text'>
Set flags at the top level pmops callbacks to track
state.  This cleans up the current set of flags and
properly handles S4 on S0ix capable systems.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: correct the watermark settings for Polaris</title>
<updated>2021-03-10T21:21:21Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-03-05T06:21:26Z</published>
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<id>urn:sha1:48123d068fcb584838ce29912660c5e9490bad0e</id>
<content type='text'>
The "/ 10" should be applied to the right-hand operand instead of
the left-hand one.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Noticed-by: Georgios Toptsidis &lt;gtoptsid@gmail.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: bug fix for pcie dpm</title>
<updated>2021-03-10T21:20:34Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2021-03-09T13:10:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=50ceb1fe7acd50831180f4b5597bf7b39e8059c8'/>
<id>urn:sha1:50ceb1fe7acd50831180f4b5597bf7b39e8059c8</id>
<content type='text'>
Currently the pcie dpm has two problems.
1. Only the high dpm level speed/width can be overrided
if the requested values are out of the pcie capability.
2. The high dpm level is always overrided though sometimes
it's not necesarry.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/pm: correct Arcturus mmTHM_BACO_CNTL register address</title>
<updated>2021-03-04T04:05:02Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-02-19T08:18:47Z</published>
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<id>urn:sha1:6efda1671312e8432216ee8b106e71fa3102e1d3</id>
<content type='text'>
Arcturus has a different register address from other SMU V11
ASICs.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disable</title>
<updated>2021-03-04T03:50:26Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-02-24T20:46:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=992ace410c32955eb5b2cee602ea68ac9557e35b'/>
<id>urn:sha1:992ace410c32955eb5b2cee602ea68ac9557e35b</id>
<content type='text'>
Per discussions with PMFW team, the driver only needs to
notify the PMFW when the RLC is disabled.  The RLC FW will notify
the PMFW directly when it's enabled.

Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
