<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd, branch v4.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-10-04T15:37:25Z</updated>
<entry>
<title>drm/amdkfd: Fix incorrect use of process-&gt;mm</title>
<updated>2018-10-04T15:37:25Z</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2018-10-02T22:41:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=11b29c9e25788d0afb2ddb67bcd89424bd25f2f7'/>
<id>urn:sha1:11b29c9e25788d0afb2ddb67bcd89424bd25f2f7</id>
<content type='text'>
This mm_struct pointer should never be dereferenced. If running in
a user thread, just use current-&gt;mm. If running in a kernel worker
use get_task_mm to get a safe reference to the mm_struct.

Reviewed-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Signal hw_done() after waiting for flip_done()</title>
<updated>2018-10-04T15:21:03Z</updated>
<author>
<name>Shirish S</name>
<email>shirish.s@amd.com</email>
</author>
<published>2018-09-24T13:31:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=987bf116445db5d63a5c2ed94c4479687d9c9973'/>
<id>urn:sha1:987bf116445db5d63a5c2ed94c4479687d9c9973</id>
<content type='text'>
In amdgpu_dm_commit_tail(), wait until flip_done() is signaled before
we signal hw_done().

[Why]

This is to temporarily address a paging error that occurs when a
nonblocking commit contends with another commit, particularly in a
mirrored display configuration where at least 2 CRTCs are updated.
The error occurs in drm_atomic_helper_wait_for_flip_done(), when we
attempt to access the contents of new_crtc_state-&gt;commit.

Here's the sequence for a mirrored 2 display setup (irrelevant steps
left out for clarity):

**THREAD 1**                        | **THREAD 2**
                                    |
Initialize atomic state for flip    |
                                    |
Queue worker                        |
                                   ...

                                    | Do work for flip
                                    |
                                    | Signal hw_done() on CRTC 1
                                    | Signal hw_done() on CRTC 2
                                    |
                                    | Wait for flip_done() on CRTC 1

                                &lt;---- **PREEMPTED BY THREAD 1**

Initialize atomic state for cursor  |
update (1)                          |
                                    |
Do cursor update work on both CRTCs |
                                    |
Clear atomic state (2)              |
**DONE**                            |
                                   ...
                                    |
                                    | Wait for flip_done() on CRTC 2
                                    | *ERROR*
                                    |

The issue starts with (1). When the atomic state is initialized, the
current CRTC states are duplicated to be the new_crtc_states, and
referenced to be the old_crtc_states. (The new_crtc_states are to be
filled with update data.)

Some things to note:

* Due to the mirrored configuration, the cursor updates on both CRTCs.

* At this point, the pflip IRQ has already been handled, and flip_done
  signaled on all CRTCs. The cursor commit can therefore continue.

* The old_crtc_states used by the cursor update are the **same states**
  as the new_crtc_states used by the flip worker.

At (2), the old_crtc_state is freed (*), and the cursor commit
completes. We then context switch back to the flip worker, where we
attempt to access the new_crtc_state-&gt;commit object. This is
problematic, as this state has already been freed.

(*) Technically, 'state-&gt;crtcs[i].state' is freed, which was made to
    reference old_crtc_state in drm_atomic_helper_swap_state()

[How]

By moving hw_done() after wait_for_flip_done(), we're guaranteed that
the new_crtc_state (from the flip worker's perspective) still exists.
This is because any other commit will be blocked, waiting for the
hw_done() signal.

Note that both the i915 and imx drivers have this sequence flipped
already, masking this problem.

Signed-off-by: Shirish S &lt;shirish.s@amd.com&gt;
Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix Edid emulation for linux</title>
<updated>2018-09-27T15:05:21Z</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2018-09-26T17:42:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fbbdadf2faf17cd88e9c447701495540377c5743'/>
<id>urn:sha1:fbbdadf2faf17cd88e9c447701495540377c5743</id>
<content type='text'>
[Why]
EDID emulation didn't work properly for linux, as we stop programming
if nothing is connected physically.

[How]
We get a flag from DRM when we want to do edid emulation. We check if
this flag is true and nothing is connected physically, if so we only
program the front end using VIRTUAL_SIGNAL.

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix Vega10 lightup on S3 resume</title>
<updated>2018-09-27T15:03:12Z</updated>
<author>
<name>Roman Li</name>
<email>Roman.Li@amd.com</email>
</author>
<published>2018-09-26T17:42:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=599760d6d0abbab71f9726b49858d2ec45e74c0a'/>
<id>urn:sha1:599760d6d0abbab71f9726b49858d2ec45e74c0a</id>
<content type='text'>
[Why]
There have been a few reports of Vega10 display remaining blank
after S3 resume. The regression is caused by workaround for mode
change on Vega10 - skip set_bandwidth if stream count is 0.
As a result we skipped dispclk reset on suspend, thus on resume
we may skip the clock update assuming it hasn't been changed.
On some systems it causes display blank or 'out of range'.

[How]
Revert "drm/amd/display: Fix Vega10 black screen after mode change"
Verified that it hadn't cause mode change regression.

Signed-off-by: Roman Li &lt;Roman.Li@amd.com&gt;
Reviewed-by: Sun peng Li &lt;Sunpeng.Li@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix vce work queue was not cancelled when suspend</title>
<updated>2018-09-27T15:01:20Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-09-27T12:48:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=61ea6f5831974ebd1a57baffd7cc30600a2e26fc'/>
<id>urn:sha1:61ea6f5831974ebd1a57baffd7cc30600a2e26fc</id>
<content type='text'>
The vce cancel_delayed_work_sync never be called.
driver call the function in error path.

This caused the A+A suspend hang when runtime pm enebled.
As we will visit the smu in the idle queue. this will cause
smu hang because the dgpu has been suspend, and the dgpu also
will be waked up. As the smu has been hang, so the dgpu resume
will failed.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdkfd: Fix ATS capablity was not reported correctly on some APUs</title>
<updated>2018-09-20T15:25:23Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2018-09-13T01:42:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=44d8cc6f1a905e4bb1d4221a898abb0d7e9d100a'/>
<id>urn:sha1:44d8cc6f1a905e4bb1d4221a898abb0d7e9d100a</id>
<content type='text'>
Because CRAT_CU_FLAGS_IOMMU_PRESENT was not set in some BIOS crat, we
need to workaround this.

For future compatibility, we also overwrite the bit in capability according
to the value of needs_iommu_device.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Change the control stack MTYPE from UC to NC on GFX9</title>
<updated>2018-09-20T15:25:17Z</updated>
<author>
<name>Yong Zhao</name>
<email>yong.zhao@amd.com</email>
</author>
<published>2018-09-13T01:42:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=15426dbb65c5b37680d27e84d58a1ed3b8532518'/>
<id>urn:sha1:15426dbb65c5b37680d27e84d58a1ed3b8532518</id>
<content type='text'>
CWSR fails on Raven if the control stack is MTYPE_UC, which is used
for regular GART mappings. As a workaround we map it using MTYPE_NC.

The MEC firmware expects the control stack at one page offset from the
start of the MQD so it is part of the MQD allocation on GFXv9. AMDGPU
added a memory allocation flag just for this purpose.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Yong Zhao &lt;yong.zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix SDMA HQD destroy error on gfx_v7</title>
<updated>2018-09-20T15:25:01Z</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2018-09-13T01:42:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=caaa4c8a6be2a275bd14f2369ee364978ff74704'/>
<id>urn:sha1:caaa4c8a6be2a275bd14f2369ee364978ff74704</id>
<content type='text'>
A wrong register bit was examinated for checking SDMA status so it reports
false failures. This typo only appears on gfx_v7. gfx_v8 checks the correct
bit.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add new polaris pci id</title>
<updated>2018-09-20T03:35:23Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-09-18T20:28:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=30f3984ede683b98a4e8096e200df78bf0609b4f'/>
<id>urn:sha1:30f3984ede683b98a4e8096e200df78bf0609b4f</id>
<content type='text'>
Add new pci id.

Reviewed-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: fix error handling in amdgpu_cs_user_fence_chunk</title>
<updated>2018-09-11T21:35:00Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-09-10T13:52:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0165de983272d1fae0809ed9db47c46a412279bc'/>
<id>urn:sha1:0165de983272d1fae0809ed9db47c46a412279bc</id>
<content type='text'>
Slowly leaking memory one page at a time :)

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
