<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd, branch v5.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-08-27T17:25:20Z</updated>
<entry>
<title>drm/amdgpu: fix GFXOFF on Picasso and Raven2</title>
<updated>2019-08-27T17:25:20Z</updated>
<author>
<name>Aaron Liu</name>
<email>aaron.liu@amd.com</email>
</author>
<published>2019-08-27T14:59:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=41940ff50f6c347f3541163702566cd526200d98'/>
<id>urn:sha1:41940ff50f6c347f3541163702566cd526200d98</id>
<content type='text'>
For picasso(adev-&gt;pdev-&gt;device == 0x15d8)&amp;raven2(adev-&gt;rev_id &gt;= 0x8),
firmware is sufficient to support gfxoff.
In commit 98f58ada2d37e, for picasso&amp;raven2,
return directly and cause gfxoff disabled.

Fixes: 98f58ada2d37 ("drm/amdgpu/gfx9: update pg_flags after determining if gfx off is possible")
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Aaron Liu &lt;aaron.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: Add APTX quirk for Dell Latitude 5495</title>
<updated>2019-08-27T17:24:40Z</updated>
<author>
<name>Kai-Heng Feng</name>
<email>kai.heng.feng@canonical.com</email>
</author>
<published>2019-08-27T09:33:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=317a3aaef94d73ba6be88aea11b41bb631b2d581'/>
<id>urn:sha1:317a3aaef94d73ba6be88aea11b41bb631b2d581</id>
<content type='text'>
Needs ATPX rather than _PR3 to really turn off the dGPU. This can save
~5W when dGPU is runtime-suspended.

Signed-off-by: Kai-Heng Feng &lt;kai.heng.feng@canonical.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/powerplay: correct Vega20 dpm level related settings</title>
<updated>2019-08-27T17:23:40Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2019-08-19T05:17:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=83e09d5bddbee749fc83063890244397896a1971'/>
<id>urn:sha1:83e09d5bddbee749fc83063890244397896a1971</id>
<content type='text'>
Correct the settings for auto mode and skip the unnecessary
settings for dcefclk and fclk.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/powerplay: Fix Vega20 power reading again</title>
<updated>2019-08-26T21:20:32Z</updated>
<author>
<name>Kent Russell</name>
<email>kent.russell@amd.com</email>
</author>
<published>2019-08-23T13:13:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=23b7f6c41d4717b1638eca47e09d7e99fc7b9fd9'/>
<id>urn:sha1:23b7f6c41d4717b1638eca47e09d7e99fc7b9fd9</id>
<content type='text'>
For the 40.46 SMU release, they changed CurrSocketPower to
AverageSocketPower, but this was changed back in 40.47 so just check if
it's 40.46 and make the appropriate change

Tested with 40.45, 40.46 and 40.47 successfully

Signed-off-by: Kent Russell &lt;kent.russell@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/powerplay: Fix Vega20 Average Power value v4</title>
<updated>2019-08-26T21:20:02Z</updated>
<author>
<name>Kent Russell</name>
<email>kent.russell@amd.com</email>
</author>
<published>2019-08-22T12:17:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=21649c0b6b7899f4fa3099c46d3d027f60b107ec'/>
<id>urn:sha1:21649c0b6b7899f4fa3099c46d3d027f60b107ec</id>
<content type='text'>
The SMU changed reading from CurrSocketPower to AverageSocketPower, so
reflect this accordingly. This fixes the issue where Average Power
Consumption was being reported as 0 from SMU 40.46-onward

v2: Fixed headline prefix
v3: Add check for SMU version for proper compatibility
v4: Style fix

Signed-off-by: Kent Russell &lt;kent.russell@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix dma_fence_wait without reference</title>
<updated>2019-08-26T20:33:36Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2019-08-16T12:56:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=42068e1ef961c719f967dbbb4ddcb394a0ba7917'/>
<id>urn:sha1:42068e1ef961c719f967dbbb4ddcb394a0ba7917</id>
<content type='text'>
We need to grab a reference to the fence we wait for.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/powerplay: silence a warning in smu_v11_0_setup_pptable</title>
<updated>2019-08-23T01:46:32Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexdeucher@gmail.com</email>
</author>
<published>2019-08-22T03:25:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=75710f08ea7e41b2f7010da3f6deab061f7a853b'/>
<id>urn:sha1:75710f08ea7e41b2f7010da3f6deab061f7a853b</id>
<content type='text'>
I think gcc is confused as I don't see how size could be used
unitialized, but go ahead and silence the warning.

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190822032527.1376-1-alexander.deucher@amd.com
</content>
</entry>
<entry>
<title>drm/amd/display: Calculate bpc based on max_requested_bpc</title>
<updated>2019-08-21T22:33:32Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2019-08-21T15:27:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ec6e491353b9024d4b1a65c48b21e3bc0faeae4e'/>
<id>urn:sha1:ec6e491353b9024d4b1a65c48b21e3bc0faeae4e</id>
<content type='text'>
[Why]
The only place where state-&gt;max_bpc is updated on the connector is
at the start of atomic check during drm_atomic_connector_check. It
isn't updated when adding the connectors to the atomic state after
the fact. It also doesn't necessarily reflect the right value when
called in amdgpu during mode validation outside of atomic check.

This can cause the wrong bpc to be used even if the max_requested_bpc
is the correct value.

[How]
Don't rely on state-&gt;max_bpc reflecting the real bpc value and just
do the min(...) based on display info bpc and max_requested_bpc.

Fixes: 01933ba42d3d ("drm/amd/display: Use current connector state if NULL when checking bpc")
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: prevent memory leaks in AMDGPU_CS ioctl</title>
<updated>2019-08-21T22:32:39Z</updated>
<author>
<name>Nicolai Hähnle</name>
<email>nicolai.haehnle@amd.com</email>
</author>
<published>2019-08-20T13:39:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1a701ea924815b0518733aa8d5d05c1f6fa87062'/>
<id>urn:sha1:1a701ea924815b0518733aa8d5d05c1f6fa87062</id>
<content type='text'>
Error out if the AMDGPU_CS ioctl is called with multiple SYNCOBJ_OUT and/or
TIMELINE_SIGNAL chunks, since otherwise the last chunk wins while the
allocated array as well as the reference counts of sync objects are leaked.

Signed-off-by: Nicolai Hähnle &lt;nicolai.haehnle@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: disable MMHUB PG for navi10</title>
<updated>2019-08-21T22:32:24Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2019-08-20T07:11:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=221a2bdbd5d3871a5f41d912b2f06cc02e8f8b38'/>
<id>urn:sha1:221a2bdbd5d3871a5f41d912b2f06cc02e8f8b38</id>
<content type='text'>
Disable MMHUB PG for navi10 according to the production requirement.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
