<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/mediatek, branch v4.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-10-06T01:06:30Z</updated>
<entry>
<title>treewide: Replace more open-coded allocation size multiplications</title>
<updated>2018-10-06T01:06:30Z</updated>
<author>
<name>Kees Cook</name>
<email>keescook@chromium.org</email>
</author>
<published>2018-10-05T23:21:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=329e09893909d409039f6a79757d9b80b67efe39'/>
<id>urn:sha1:329e09893909d409039f6a79757d9b80b67efe39</id>
<content type='text'>
As done treewide earlier, this catches several more open-coded
allocation size calculations that were added to the kernel during the
merge window. This performs the following mechanical transformations
using Coccinelle:

	kvmalloc(a * b, ...) -&gt; kvmalloc_array(a, b, ...)
	kvzalloc(a * b, ...) -&gt; kvcalloc(a, b, ...)
	devm_kzalloc(..., a * b, ...) -&gt; devm_kcalloc(..., a, b, ...)

Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: fix connection from RDMA2 to DSI1</title>
<updated>2018-08-27T03:24:37Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=08bcbed747eb87f00d2e2590b49607af1a9f4fe9'/>
<id>urn:sha1:08bcbed747eb87f00d2e2590b49607af1a9f4fe9</id>
<content type='text'>
This patch fix connection from RDMA2 to DSI1

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: update some variable name from ovl to comp</title>
<updated>2018-08-27T03:24:37Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f265905c939e21a0c9e83540d4c2776c3e43c310'/>
<id>urn:sha1:f265905c939e21a0c9e83540d4c2776c3e43c310</id>
<content type='text'>
This patch update some variable name from ovl to comp

Because RDMA would be first HW in ddp, the naming ovl
should be change to comp.

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: use layer_nr function to get layer number to init plane</title>
<updated>2018-08-27T03:24:37Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=66b2cf9623facfad790b335fcfd717258a00896b'/>
<id>urn:sha1:66b2cf9623facfad790b335fcfd717258a00896b</id>
<content type='text'>
This patch use layer_nr function to get layer number to init plane

When plane init in crtc create,
it use the number of OVL layer to init plane.
That's OVL can read 4 memory address.

For mt2712 third ddp, it use RDMA to read memory.
RDMA can read 1 memory address, so it just init one plane.

For compatibility, this patch use mtk_ddp_comp_layer_nr function
to get layer number from their HW component in ddp for plane init.

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: add function to return RDMA layer number</title>
<updated>2018-08-27T03:24:37Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=98b6d76f957ba80017a3118fe0e33030b4bc017b'/>
<id>urn:sha1:98b6d76f957ba80017a3118fe0e33030b4bc017b</id>
<content type='text'>
This patch add function to return RDMA layer number

RDMA always has one layer.

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: add function to return OVL layer number</title>
<updated>2018-08-27T03:24:36Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1cbcb763ea5035e7ef01010ea68eb3b5143ad7cb'/>
<id>urn:sha1:1cbcb763ea5035e7ef01010ea68eb3b5143ad7cb</id>
<content type='text'>
This patch add function to return OVL layer number

For now, MT8173, MT2712, MT2701 OVL all has 4 layer.

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: add function to get layer number for component</title>
<updated>2018-08-27T03:24:36Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=650afd49572b56a5c58134d4acfeb77acc69d622'/>
<id>urn:sha1:650afd49572b56a5c58134d4acfeb77acc69d622</id>
<content type='text'>
This patch add function to get layer number for component

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: add YUYV/UYVY color format support for RDMA</title>
<updated>2018-08-27T03:24:36Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=94420a63cf784945061b7b5f38511b7a48f034eb'/>
<id>urn:sha1:94420a63cf784945061b7b5f38511b7a48f034eb</id>
<content type='text'>
This patch add YUYV/UYVY color format support for RDMA
and transform matrix for YUYV/UYVY.

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: add the comment about color format setting for OVL</title>
<updated>2018-08-27T03:24:36Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=55b53f6f7ccf0990ad83acf4fdb0436ff79fdfb6'/>
<id>urn:sha1:55b53f6f7ccf0990ad83acf4fdb0436ff79fdfb6</id>
<content type='text'>
This patch add the comment about color format setting for OVL

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
<entry>
<title>drm/mediatek: add RGB color format support for RDMA</title>
<updated>2018-08-27T03:24:36Z</updated>
<author>
<name>Stu Hsieh</name>
<email>stu.hsieh@mediatek.com</email>
</author>
<published>2018-08-09T02:15:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b428391ed6bd5e3cb8ea9d1738ef4bd16af6cdb2'/>
<id>urn:sha1:b428391ed6bd5e3cb8ea9d1738ef4bd16af6cdb2</id>
<content type='text'>
This patch add RGB color format support for RDMA,
including RGB565, RGB888, RGBA8888 and ARGB8888.

Signed-off-by: Stu Hsieh &lt;stu.hsieh@mediatek.com&gt;
Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
</content>
</entry>
</feed>
