linux/drivers/gpu/drm/msm, branch v5.4

drm/msm/dsi: Implement reset correctly

2019-10-11T18:04:31Z

On msm8998, vblank timeouts are observed because the DSI controller is not reset properly, which ends up stalling the MDP. This is because the reset logic is not correct per the hardware documentation. The documentation states that after asserting reset, software should wait some time (no indication of how long), or poll the status register until it returns 0 before deasserting reset. wmb() is insufficient for this purpose since it just ensures ordering, not timing between writes. Since asserting and deasserting reset occurs on the same register, ordering is already guaranteed by the architecture, making the wmb extraneous. Since we would define a timeout for polling the status register to avoid a possible infinite loop, lets just use a static delay of 20 ms, since 16.666 ms is the time available to process one frame at 60 fps. Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support") Cc: Hai Li Cc: Rob Clark Signed-off-by: Jeffrey Hugo Reviewed-by: Sean Paul [seanpaul renamed RESET_DELAY to DSI_RESET_TOGGLE_DELAY_MS] Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20191011133939.16551-1-jeffrey.l.hugo@gmail.com

drm/msm: Use the correct dma_sync calls harder

2019-09-04T17:05:05Z

Looks like the dma_sync calls don't do what we want on armv7 either. Fixes: Unable to handle kernel paging request at virtual address 50001000 pgd = (ptrval) [50001000] *pgd=00000000 Internal error: Oops: 805 [#1] SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.3.0-rc6-00271-g9f159ae07f07 #4 Hardware name: Freescale i.MX53 (Device Tree Support) PC is at v7_dma_clean_range+0x20/0x38 LR is at __dma_page_cpu_to_dev+0x28/0x90 pc : [] lr : [] psr: 20000013 sp : d80b5a88 ip : de96c000 fp : d840ce6c r10: 00000000 r9 : 00000001 r8 : d843e010 r7 : 00000000 r6 : 00008000 r5 : ddb6c000 r4 : 00000000 r3 : 0000003f r2 : 00000040 r1 : 50008000 r0 : 50001000 Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none Control: 10c5387d Table: 70004019 DAC: 00000051 Process swapper/0 (pid: 1, stack limit = 0x(ptrval)) Signed-off-by: Rob Clark Fixes: 3de433c5b38a ("drm/msm: Use the correct dma_sync calls in msm_gem") Tested-by: Fabio Estevam

drm/msm: remove unlikely() from WARN_ON() conditions

2019-09-04T15:42:45Z

"unlikely(WARN_ON(x))" is excessive. WARN_ON() already uses unlikely() internally. Signed-off-by: Denis Efremov Cc: Rob Clark Cc: Sean Paul Cc: Joe Perches Cc: Andrew Morton Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Reviewed-by: Bjorn Andersson Signed-off-by: Rob Clark

drm/msm/dsi: Fix return value check for clk_get_parent

2019-09-03T23:17:02Z

clk_get_parent returns an error pointer upon failure, not NULL. So the checks as they exist won't catch a failure. This patch changes the checks and the return values to properly handle an error pointer. Fixes: c4d8cfe516dc ("drm/msm/dsi: add implementation for helper functions") Cc: Sibi Sankar Cc: Sean Paul Cc: Rob Clark Cc: # v4.19+ Signed-off-by: Sean Paul Signed-off-by: Rob Clark

drm/msm: add atomic traces

2019-09-03T23:17:02Z

This was useful for debugging fps drops. I suspect it will be useful again. Signed-off-by: Rob Clark Reviewed-by: Sean Paul

drm/msm/dpu: async commit support

2019-09-03T23:17:01Z

In addition, moving to kms->flush_commit() lets us drop the only user of kms->commit(). Signed-off-by: Rob Clark Reviewed-by: Sean Paul

drm/msm: async commit support

2019-09-03T23:17:01Z

Now that flush/wait/complete is decoupled from the "synchronous" part of atomic commit_tail(), add support to defer flush to a timer that expires shortly before vblank for async commits. In this way, multiple atomic commits (for example, cursor updates) can be coalesced into a single flush at the end of the frame. v2: don't hold lock over ->wait_flush(), to avoid locking interaction that was causing fps drop when combining page flips or non-async atomic commits and lots of legacy cursor updates Signed-off-by: Rob Clark Reviewed-by: Sean Paul

drm/msm: split power control from prepare/complete_commit

2019-09-03T23:17:01Z

With atomic commit, ->prepare_commit() and ->complete_commit() may not be evenly balanced (although ->complete_commit() will complete each crtc that had been previously prepared). So these will no longer be a good place to enable/disable clocks needed for hw access. Signed-off-by: Rob Clark Reviewed-by: Sean Paul

drm/msm: add kms->flush_commit()

2019-09-03T23:17:01Z

Add ->flush_commit(crtc_mask). Currently a no-op, but kms backends should migrate writing flush registers to this hook, so we can decouple pushing updates to hardware, and flushing the updates. Once we add async commit support, the hw updates will be pushed down to the hw synchronously, but flushing the updates will be deferred until as close to vblank as possible, so that multiple updates can be combined in a single frame. Signed-off-by: Rob Clark Reviewed-by: Sean Paul

drm/msm: convert kms->complete_commit() to crtc_mask

2019-09-03T23:17:01Z

Prep work for async commits, in which case this will be called after we no longer have the atomic state object. This drops some wait_for_vblanks(), but those should be unnecessary, as we call this after waiting for flush to complete. Signed-off-by: Rob Clark Reviewed-by: Sean Paul