<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/tegra, branch v4.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2015-02-19T13:21:51Z</updated>
<entry>
<title>drm/tegra: dc: Move more code into -&gt;init()</title>
<updated>2015-02-19T13:21:51Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-01-28T14:17:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=07d05cbf60ed8f06c61484d3d85c06c1aa7edf38'/>
<id>urn:sha1:07d05cbf60ed8f06c61484d3d85c06c1aa7edf38</id>
<content type='text'>
The code in tegra_crtc_prepare() really belongs in tegra_dc_init(), or
at least most of it. This fixes an issue with VBLANK handling because
tegra_crtc_prepare() would overwrite the interrupt mask register that
tegra_crtc_enable_vblank() had written to to enable VBLANK interrupts.

Tested-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: dc: Wire up CRTC parent of atomic state</title>
<updated>2015-02-19T13:21:47Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-01-28T14:03:31Z</published>
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<id>urn:sha1:332bbe7003badae01fed55b11820fcd467b3bbf4</id>
<content type='text'>
Store a pointer to the CRTC in its atomic state to make it easy for
state handling code to get at the CRTC.

Tested-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: dc: Reset state's active_changed field</title>
<updated>2015-02-19T13:21:43Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-02-19T11:35:56Z</published>
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<id>urn:sha1:567a3cd1d75e3f282759af3bd05a7369daef2b2a</id>
<content type='text'>
Commit eab3bbeffd15 ("drm/atomic: Add drm_crtc_state-&gt;active") added the
field to track the DPMS state. However, the Tegra driver was in modified
in parallel and subclasses the CRTC atomic state, so needed to duplicate
the code in the atomic helpers. After the addition of the active_changed
field it became out of sync and doesn't reset it when duplicating state.

This causes a full modeset on things like page-flips, which will in turn
cause warnings due to the VBLANK machinery being disabled when it really
should remain on.

Tested-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: hdmi: Explicitly set clock rate</title>
<updated>2015-02-19T13:21:25Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-02-18T09:34:08Z</published>
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<id>urn:sha1:c03bf1bfd3a5448a4474f02b839f2195e3719cd9</id>
<content type='text'>
Recent changes in the clock framework have caused a behavioural change
in that clocks that have not had their rate set explicitly will now be
reset to their initial rate (or 0) when the clock is released. This is
triggered in the deferred probing path, resulting in the clock running
at a wrong frequency after the successful probe.

This can be easily fixed by setting the rate explicitly rather than by
relying on the implicit rate inherited by the parent.

Tested-by: Tomeu Vizoso &lt;tomeu.vizoso@collabora.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Use correct relocation target offsets</title>
<updated>2015-01-27T09:14:59Z</updated>
<author>
<name>David Ung</name>
<email>davidu@nvidia.com</email>
</author>
<published>2015-01-21T02:37:35Z</published>
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<id>urn:sha1:31f40f86526b71009973854c1dfe799ee70f7588</id>
<content type='text'>
When copying a relocation from userspace, copy the correct target
offset.

Signed-off-by: David Ung &lt;davidu@nvidia.com&gt;
Fixes: 961e3beae3b2 ("drm/tegra: Make job submission 64-bit safe")
Cc: stable@vger.kernel.org
[treding@nvidia.com: provide a better commit message]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Add minimal power management</title>
<updated>2015-01-27T09:14:58Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-18T16:15:25Z</published>
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<id>urn:sha1:359ae687dbd16c76f5519a5750444f5a3b00ad18</id>
<content type='text'>
For now only disable the KMS hotplug polling helper logic upon suspend
and re-enable it on resume.

Reviewed-by: Sean Paul &lt;seanpaul@chromium.org&gt;
Reviewed-by: Mark Zhang &lt;markz@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: dc: Unify enabling the display controller</title>
<updated>2015-01-27T09:14:58Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-08T15:32:47Z</published>
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<id>urn:sha1:666cb873328b5075eb511662858bab02d084ff64</id>
<content type='text'>
Previously output drivers would enable continuous display mode and power
up the display controller at various points during the initialization.
This is suboptimal because it accesses display controller registers in
output drivers and duplicates a bit of code.

Move this code into the display controller driver and enable the display
controller as the final step of the -&gt;mode_set_nofb() implementation.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Track tiling and format in plane state</title>
<updated>2015-01-27T09:14:57Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-11-28T12:14:55Z</published>
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<id>urn:sha1:8f604f8c4dd2d5383f567856450ba12764061c12</id>
<content type='text'>
Tracking these in the plane state allows them to be computed in the
-&gt;atomic_check() callback and reused when applying the configuration in
-&gt;atomic_update().

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Track active planes in CRTC state</title>
<updated>2015-01-27T09:14:56Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-11-26T11:28:39Z</published>
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<id>urn:sha1:47802b09a9c2d1f8a562c7fae2f61a8923ac8d06</id>
<content type='text'>
Wrap struct drm_crtc_state in a driver-specific structure and add the
planes field which keeps track of which planes are updated or disabled
during a modeset. This allows atomic updates of the the display engine
at -&gt;atomic_flush() time.

v2: open-code getting the state of the CRTC that the plane is being
    attached to (Daniel Vetter)

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Remove unused -&gt;mode_fixup() callbacks</title>
<updated>2015-01-27T09:14:56Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-19T14:19:21Z</published>
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<id>urn:sha1:3f0fb52ef013e76159b35386f22924f99d8034a4</id>
<content type='text'>
All output drivers have now been converted to use the -&gt;atomic_check()
callback, so the -&gt;mode_fixup() callbacks are no longer used.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
