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<title>linux/drivers/gpu/host1x/dev.c, branch v5.6</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.6</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.6'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-01-10T16:05:12Z</updated>
<entry>
<title>gpu: host1x: Remove dev_err() on platform_get_irq() failure</title>
<updated>2020-01-10T16:05:12Z</updated>
<author>
<name>YueHaibing</name>
<email>yuehaibing@huawei.com</email>
</author>
<published>2019-11-02T07:57:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=033ccdb7f6b11701623507339646013b4ce389d3'/>
<id>urn:sha1:033ccdb7f6b11701623507339646013b4ce389d3</id>
<content type='text'>
platform_get_irq() will call dev_err() itself on failure,
so there is no need for the driver to also do this.
This is detected by coccinelle.

Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Set DMA mask based on IOMMU setup</title>
<updated>2019-10-29T14:04:35Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-10-28T12:37:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=06867a362de08ff94fb573d84fd213795fbb3922'/>
<id>urn:sha1:06867a362de08ff94fb573d84fd213795fbb3922</id>
<content type='text'>
If the Tegra DRM clients are backed by an IOMMU, push buffers are likely
to be allocated beyond the 32-bit boundary if sufficient system memory
is available. This is problematic on earlier generations of Tegra where
host1x supports a maximum of 32 address bits for the GATHER opcode. More
recent versions of Tegra (Tegra186 and later) have a wide variant of the
GATHER opcode, which allows addressing up to 64 bits of memory.

If host1x itself is behind an IOMMU as well this doesn't matter because
the IOMMU's input address space is restricted to 32 bits on generations
without support for wide GATHER opcodes.

However, if host1x is not behind an IOMMU, it won't be able to process
push buffers beyond the 32-bit boundary on Tegra generations that don't
support wide GATHER opcodes. Restrict the DMA mask to 32 bits on these
generations prevents buffers from being allocated from beyond the 32-bit
boundary.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Support DMA mapping of buffers</title>
<updated>2019-10-29T14:04:35Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-10-28T12:37:13Z</published>
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<id>urn:sha1:af1cbfb9bf0fe079ca328231451fd4db8b3eafec</id>
<content type='text'>
If host1x_bo_pin() returns an SG table, create a DMA mapping for the
buffer. For buffers that the host1x client has already mapped itself,
host1x_bo_pin() returns NULL and the existing DMA address is used.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Clean up debugfs on removal</title>
<updated>2019-10-29T14:04:34Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-10-28T12:37:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=44156eee91ba6f027afbfd6a39016c0e7e31c8e9'/>
<id>urn:sha1:44156eee91ba6f027afbfd6a39016c0e7e31c8e9</id>
<content type='text'>
The debugfs files created for host1x are never removed, causing these
files to be left dangling in debugfs. This results in a crash when any
of these files are accessed after the host1x driver has been removed,
as well as a failure to create the debugfs entries when they are added
again on driver probe.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Explicitly initialize host1x_info structures</title>
<updated>2019-10-28T10:18:33Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-09-05T09:39:05Z</published>
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<id>urn:sha1:8f45f5071ad2be6ace6f77892e0015e89fd42028</id>
<content type='text'>
It's technically not required to explicitly initialize the fields that
will be zero by default, but it's easier to read these structures if
they are all initialized uniformly.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Do not limit DMA segment size</title>
<updated>2019-10-28T10:18:08Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-09-09T12:28:46Z</published>
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<id>urn:sha1:d98914ebc2af4504e2abc266610c29b4131598a3</id>
<content type='text'>
host1x nor any its clients have any limitations on the DMA segment size,
so don't pretend that they do.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm/tegra/for-5.3-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next</title>
<updated>2019-06-25T02:59:43Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2019-06-25T02:59:35Z</published>
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<id>urn:sha1:dfd03396d7b66f90071aa5e8fdc0f3c4a66471c5</id>
<content type='text'>
drm/tegra: Changes for v5.3-rc1

This contains a couple of small improvements and cleanups for the Tegra
DRM driver.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;

From: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190621150753.19550-1-thierry.reding@gmail.com
</content>
</entry>
<entry>
<title>gpu: host1x: Do not output error message for deferred probe</title>
<updated>2019-06-05T13:05:49Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-06-04T15:31:50Z</published>
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<id>urn:sha1:4bb923e8075f3acbe2e422e9bfd0235b21d3e643</id>
<content type='text'>
When deferring probe, avoid logging a confusing error message. While at
it, make the error message more informational.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201</title>
<updated>2019-05-30T18:29:52Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-28T17:10:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9952f6918daa4ab5fc81307a9f90e31a4df3b200'/>
<id>urn:sha1:9952f6918daa4ab5fc81307a9f90e31a4df3b200</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 228 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Steve Winslow &lt;swinslow@gmail.com&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>gpu: host1x: Support 40-bit addressing on Tegra186</title>
<updated>2019-02-07T17:28:58Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-01T13:28:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8de896eb206fea3caa26b5fc8e637934d8486f0f'/>
<id>urn:sha1:8de896eb206fea3caa26b5fc8e637934d8486f0f</id>
<content type='text'>
The host1x and clients instantiated on Tegra186 support addressing 40
bits of memory.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
