linux/drivers/gpu/host1x/dev.c, branch v6.4Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
https://git.shady.money/linux/atom?h=v6.42023-03-20T18:12:37Zgpu: host1x: fix uninitialized variable use2023-03-20T18:12:37ZArnd Bergmannarnd@arndb.de2023-01-27T22:14:00Zurn:sha1:7d31677bb7b1944ac89e9155110dc1b9acbb3895
The error handling for platform_get_irq() failing no longer works after
a recent change, clang now points this out with a warning:
drivers/gpu/host1x/dev.c:520:6: error: variable 'syncpt_irq' is uninitialized when used here [-Werror,-Wuninitialized]
if (syncpt_irq < 0)
^~~~~~~~~~
Fix this by removing the variable and checking the correct error status.
Fixes: 625d4ffb438c ("gpu: host1x: Rewrite syncpoint interrupt handling")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
gpu: host1x: Rewrite syncpoint interrupt handling2023-01-26T14:55:38ZMikko Perttunenmperttunen@nvidia.com2023-01-19T13:09:20Zurn:sha1:625d4ffb438cacc9b1ebaa48748cdc7171587cdc
Move from the old, complex intr handling code to a new implementation
based on dma_fences. While there is a fair bit of churn to get there,
the new implementation is much simpler and likely faster as well due
to allowing signaling directly from interrupt context.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Add stream ID register data for NVDEC on Tegra2342022-11-25T15:14:58ZMikko Perttunenmperttunen@nvidia.com2022-09-20T08:12:00Zurn:sha1:97b93b7a4adcf3f9b07a323571685e612388b7d8
Add entries for NVDEC to the Tegra234 SID table.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Avoid trying to use GART on Tegra202022-11-18T08:33:20ZRobin Murphyrobin.murphy@arm.com2022-10-20T14:23:40Zurn:sha1:c2418f911a31a266af4fbaca998dc73d3676475a
Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with
bus") quite some time ago, the GART driver has effectively disabled
itself to avoid issues with the GPU driver expecting it to work in ways
that it doesn't. As of commit 57365a04c921 ("iommu: Move bus setup to
IOMMU device registration") that bodge no longer works, but really the
GPU driver should be responsible for its own behaviour anyway. Make the
workaround explicit.
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Suggested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Tegra234 device data and headers2022-07-08T14:27:52ZMikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:04Zurn:sha1:9abdd497cd0ac08ed55aea30de1e46d73eef9fc5
Add device data and chip headers for Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Allow reset to be missing2022-07-08T14:27:52ZMikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:02Zurn:sha1:ee8f894f3fb326ac17b243441b8cbbb6fb0d0932
Host1x on Tegra234 does not have a software-controllable reset line.
As such, don't bail out if we don't find one in the device tree.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Program virtualization tables2022-07-08T14:27:52ZMikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:01Zurn:sha1:939179fab8ff42165c1e9a487495a3f2f3319e18
Program virtualization tables specifying which VMs have access to which
Host1x hardware resources. Programming these has become mandatory in
Tegra234.
For now, since the driver does not operate as a Host1x hypervisor, we
basically allow access to everything to everyone.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Simplify register mapping and add common aperture2022-07-08T14:27:52ZMikko Perttunenmperttunen@nvidia.com2022-06-27T14:20:00Zurn:sha1:97dea367d8dab90b520cda589f83c60514013110
Refactor 'regs' property loading using devm_platform_ioremap_*
and add loading of the 'common' region found on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Add context device management code2022-07-08T14:27:52ZMikko Perttunenmperttunen@nvidia.com2022-06-27T14:19:48Zurn:sha1:8aa5bcb61612060429223d1fbb7a1c30a579fc1f
Add code to register context devices from device tree, allocate them
out and manage their refcounts.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
gpu: host1x: Fix a memory leak in 'host1x_remove()'2022-03-01T10:13:09ZChristophe JAILLETchristophe.jaillet@wanadoo.fr2021-11-07T21:16:36Zurn:sha1:025c6643a81564f066d8381b9e2f4603e0f8438f
Add a missing 'host1x_channel_list_free()' call in the remove function,
as already done in the error handling path of the probe function.
Fixes: 8474b02531c4 ("gpu: host1x: Refactor channel allocation code")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>