<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/mailbox, branch v5.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-02-18T16:40:58Z</updated>
<entry>
<title>mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush timeout issue</title>
<updated>2019-02-18T16:40:58Z</updated>
<author>
<name>Rayagonda Kokatanur</name>
<email>rayagonda.kokatanur@broadcom.com</email>
</author>
<published>2019-02-04T19:21:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d7bf31a0f85faaf63c63c39d55154825a1eaaea9'/>
<id>urn:sha1:d7bf31a0f85faaf63c63c39d55154825a1eaaea9</id>
<content type='text'>
RING_CONTROL reg was not written due to wrong address, hence all
the subsequent ring flush was timing out.

Fixes: a371c10ea4b3 ("mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence")

Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Signed-off-by: Ray Jui &lt;ray.jui@broadcom.com&gt;
Reviewed-by: Scott Branden &lt;scott.branden@broadcom.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: Export mbox_flush()</title>
<updated>2019-02-18T16:39:17Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-04T14:07:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4f0557795e76d049f0a1687f1f050addf4df2dac'/>
<id>urn:sha1:4f0557795e76d049f0a1687f1f050addf4df2dac</id>
<content type='text'>
The mbox_flush() function can be used by drivers that are built as
modules, so the function needs to be exported.

Reported-by: Mark Brown &lt;broonie@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: tegra-hsp: Use device-managed registration API</title>
<updated>2018-12-22T04:31:26Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-11-28T09:54:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d69e11648e486ee0f21cb246f687b083f0d4e124'/>
<id>urn:sha1:d69e11648e486ee0f21cb246f687b083f0d4e124</id>
<content type='text'>
In order to get rid of a lot of cleanup boilerplate code, use the
device-managed registration API.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: tegra-hsp: use devm_kstrdup_const()</title>
<updated>2018-12-22T04:31:26Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>brgl@bgdev.pl</email>
</author>
<published>2018-11-28T09:54:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a54d03ed01b4ed64c22d2b53d61d4049ec49a51f'/>
<id>urn:sha1:a54d03ed01b4ed64c22d2b53d61d4049ec49a51f</id>
<content type='text'>
Use devm_kstrdup_const() in the tegra-hsp driver. This mostly serves as
an example of how to use this new routine to shrink driver code.

Also use devm_kzalloc() instead of regular kzalloc() to shrink the
driver even more.

Doorbell objects are only removed in the driver's remove callback so
it's safe to convert all memory allocations to devres.

Signed-off-by: Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: tegra-hsp: Add suspend/resume support</title>
<updated>2018-12-22T04:31:26Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-11-28T09:54:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9a63f0f4059955210ae74c745513332a568e9738'/>
<id>urn:sha1:9a63f0f4059955210ae74c745513332a568e9738</id>
<content type='text'>
Upon resuming from a system sleep state, the interrupts for all active
shared mailboxes need to be reenabled, otherwise they will not work.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: tegra-hsp: Add support for shared mailboxes</title>
<updated>2018-12-22T04:31:26Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-11-28T09:54:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=91b1b1c3da8a8fd9ee4538e00dd5e5fb5be1cdb4'/>
<id>urn:sha1:91b1b1c3da8a8fd9ee4538e00dd5e5fb5be1cdb4</id>
<content type='text'>
The Tegra HSP block supports 'shared mailboxes' that are simple 32-bit
registers consisting of a FULL bit in MSB position and 31 bits of data.
The hardware can be configured to trigger interrupts when a mailbox
is empty or full. Add support for these shared mailboxes to the HSP
driver.

The initial use for the mailboxes is the Tegra Combined UART. For this
purpose, we use interrupts to receive data, and spinning to wait for
the transmit mailbox to be emptied to minimize unnecessary overhead.

Based on work by Mikko Perttunen &lt;mperttunen@nvidia.com&gt;.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: Allow multiple controllers per device</title>
<updated>2018-12-22T04:31:26Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2018-11-28T09:54:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8ed82e23875e6014d9aa8e03bf4301b27d614050'/>
<id>urn:sha1:8ed82e23875e6014d9aa8e03bf4301b27d614050</id>
<content type='text'>
Look through the whole controller list when mapping device tree
phandles to controllers instead of stopping at the first one.

Each controller is intended to only contain one kind of mailbox,
but some devices (like Tegra HSP) implement multiple kinds and use
the same device tree node for all of them. As such, we need to allow
multiple mbox_controllers per device tree node.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: Support blocking transfers in atomic context</title>
<updated>2018-12-22T04:31:26Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-11-28T09:54:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a8803d7421cc2be2ac12a8155e5d824f04259eff'/>
<id>urn:sha1:a8803d7421cc2be2ac12a8155e5d824f04259eff</id>
<content type='text'>
The mailbox framework supports blocking transfers via completions for
clients that can sleep. In order to support blocking transfers in cases
where the transmission is not permitted to sleep, add a new -&gt;flush()
callback that controller drivers can implement to busy loop until the
transmission has been completed. A new mbox_flush() function can be
called by mailbox consumers in atomic context to make sure a transfer
has completed.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: ti-msgmgr: Use device-managed registration API</title>
<updated>2018-12-21T22:49:26Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-12-20T17:20:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2298a6f09f455f64bf253e6fb5c1ff72f38a6249'/>
<id>urn:sha1:2298a6f09f455f64bf253e6fb5c1ff72f38a6249</id>
<content type='text'>
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>mailbox: stm32-ipcc: Use device-managed registration API</title>
<updated>2018-12-21T22:49:26Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2018-12-20T17:20:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=368d7767b50154eb052938a13494879b00135ed3'/>
<id>urn:sha1:368d7767b50154eb052938a13494879b00135ed3</id>
<content type='text'>
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Ludovic Barre &lt;ludovic.barre@st.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
</feed>
