linux/drivers/mailbox, branch v6.2

Merge tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration

2022-12-21T17:31:18Z

Pull mailbox updates from Jassi Brar: - qcom: enable sc8280xp, sm8550 and sm4250 support - ti: default to ARCH_K3 for msg manager - mediatek: - add mt8188 and mt8186 support - request irq only after got ready - zynq-ipi: fix error handling after device_register - mpfs: check sys-con status - rockchip: simplify by using device_get_match_data * tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: qcom-ipcc: Add compatible for SM8550 mailbox: mtk-cmdq: Do not request irq until we are ready mailbox: zynq-ipi: fix error handling while device_register() fails mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying mailbox: arm_mhuv2: Fix return value check in mhuv2_probe() dt-bindings: mailbox: mediatek,gce-mailbox: add mt8188 compatible name dt-bindings: mailbox: add GCE header file for mt8188 mailbox: mpfs: read the system controller's status mailbox: mtk-cmdq: add MT8186 support mailbox: mtk-cmdq: add gce ddr enable support flow mailbox: mtk-cmdq: add gce software ddr enable private data mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number mailbox: rockchip: Use device_get_match_data() to simplify the code dt-bindings: mailbox: qcom-ipcc: Add sc8280xp compatible mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support dt-bindings: mailbox: qcom: Add SM4250 APCS compatible

mailbox: mtk-cmdq: Do not request irq until we are ready

2022-12-19T02:40:31Z

If the system comes from kexec() the peripheral might trigger an IRQ befoe we are ready for it. Triggering a crash due to an access to invalid memory. Signed-off-by: Ricardo Ribalda Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chun-Kuang Hu Signed-off-by: Jassi Brar

mailbox: zynq-ipi: fix error handling while device_register() fails

2022-12-19T02:40:30Z

If device_register() fails, it has two issues: 1. The name allocated by dev_set_name() is leaked. 2. The parent of device is not NULL, device_unregister() is called in zynqmp_ipi_free_mboxes(), it will lead a kernel crash because of removing not added device. Call put_device() to give up the reference, so the name is freed in kobject_cleanup(). Add device registered check in zynqmp_ipi_free_mboxes() to avoid null-ptr-deref. Fixes: 4981b82ba2ff ("mailbox: ZynqMP IPI mailbox controller") Signed-off-by: Yang Yingliang Signed-off-by: Jassi Brar

mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying

2022-12-19T02:40:30Z

Copying platform data to struct cmdq serves to no purpose, as that data is never modified during runtime: it's worth at this point storing a pointer to gce_plat in gce and. Remove all duplicated `struct gce_plat` members from `struct gce` and reuse the platform data across the driver to save some memory. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Reviewed-by: Chun-Kuang Hu Signed-off-by: Jassi Brar

mailbox: arm_mhuv2: Fix return value check in mhuv2_probe()

2022-12-19T02:40:30Z

If devm_of_iomap() fails, it returns ERR_PTR() and never return NULL, so replace NULL pointer check with IS_ERR() to fix this problem. Fixes: 5a6338cce9f4 ("mailbox: arm_mhuv2: Add driver") Signed-off-by: Yang Yingliang Acked-by: Viresh Kumar Signed-off-by: Jassi Brar

mailbox: mpfs: read the system controller's status

2022-12-19T02:40:30Z

Some services explicitly return an error code in their response, but others rely on the system controller to set a status in its status register. The meaning of the bits varies based on what service is requested, so pass it back up to the driver that requested the service in the first place. The field in the message struct already existed, but was unused until now. If the system controller is busy, in which case we should never actually be in the interrupt handler, or if the service fails the mailbox itself should not be read. Callers should check the status before operating on the response. There's an existing, but unused, #define for the mailbox mask - but it was incorrect. It was doing a GENMASK_ULL(32, 16) which should've just been a GENMASK(31, 16), so fix that up and start using it. Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox") Signed-off-by: Conor Dooley Reviewed-by: Palmer Dabbelt Signed-off-by: Jassi Brar

mailbox: mtk-cmdq: add MT8186 support

2022-12-19T02:40:30Z

add MT8186 cmdq support Signed-off-by: Yongqiang Niu Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu Signed-off-by: Jassi Brar

mailbox: mtk-cmdq: add gce ddr enable support flow

2022-12-19T02:40:30Z

add gce ddr enable control flow when gce suspend/resume when all cmdq instruction task has been processed done, we need set this gce ddr enable to disable status to tell cmdq hardware gce there is none task need process, and the hardware can go into idle mode and no access ddr anymore, then the spm can go into suspend. the original issue is gce still access ddr when cmdq suspend function call, but there is no task run. so, we need control gce access ddr with this flow. when cmdq suspend function, there is no task need process, we can disable gce access ddr, to make sure system go into suspend success. Signed-off-by: Yongqiang Niu Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu Signed-off-by: Jassi Brar

mailbox: mtk-cmdq: add gce software ddr enable private data

2022-12-19T02:40:29Z

if gce work control by software, we need set software enable for MT8186 Soc there is a handshake flow between gce and ddr hardware, if not set ddr enable flag of gce, ddr will fall into idle mode, then gce instructions will not process done. we need set this flag of gce to tell ddr when gce is idle or busy controlled by software flow. 0x48[2:0] means control by software 0x48[18:16] means ddr enable 0x48[2:0] is pre-condition of 0x48[18:16]. if we want set 0x48[18:16] ddr enable, 0x48[2:0] must be set at same time. and only these bits is useful, other bits is useless bits Signed-off-by: Yongqiang Niu Reviewed-by: CK Hu Signed-off-by: Jassi Brar

mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number

2022-12-19T02:40:29Z

Use GCE_CTRL_BY_SW definition instead of number Signed-off-by: Yongqiang Niu Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu Signed-off-by: Jassi Brar