<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/memory/Kconfig, branch v3.18</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v3.18</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v3.18'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2014-08-25T13:35:26Z</updated>
<entry>
<title>Merge tag 'at91-drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux</title>
<updated>2014-08-25T13:35:26Z</updated>
<author>
<name>Nicolas Ferre</name>
<email>nicolas.ferre@atmel.com</email>
</author>
<published>2014-08-25T13:35:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e657ce689a85ff1c887b8020282e5b2ab1411ded'/>
<id>urn:sha1:e657ce689a85ff1c887b8020282e5b2ab1411ded</id>
<content type='text'>
Pull AT91 reset, poweroff and ram drivers from Maxime Ripard:
 "This tag holds the various new drivers introduced to move code that used to be
  in mach-at91 over to the proper frameworks.

  These files are the reboot and poweroff code for all AT91 SoCs but the RM9200,
  and the ram controller driver is not doing much at the time, except for grabing
  the RAM clock in order to leave it always enabled."

Conflicts:
	arch/arm/mach-at91/Kconfig
</content>
</entry>
<entry>
<title>memory: Freescale CoreNet Coherency Fabric error reporting driver</title>
<updated>2014-07-30T00:26:30Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2014-07-02T23:52:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=54afbec0d57f322127e3886b04fe4fd860519bfb'/>
<id>urn:sha1:54afbec0d57f322127e3886b04fe4fd860519bfb</id>
<content type='text'>
The CoreNet Coherency Fabric is part of the memory subsystem on
some Freescale QorIQ chips.  It can report coherency violations (e.g.
due to misusing memory that is mapped noncoherent) as well as
transactions that do not hit any local access window, or which hit a
local access window with an invalid target ID.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Reviewed-by: Bharat Bhushan &lt;bharat.bhushan@freescale.com&gt;
</content>
</entry>
<entry>
<title>memory: add a driver for atmel ram controllers</title>
<updated>2014-07-15T09:43:42Z</updated>
<author>
<name>Alexandre Belloni</name>
<email>alexandre.belloni@free-electrons.com</email>
</author>
<published>2014-07-08T16:21:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e81b6abebc87ec40a434ada4ca8d1f2aa16cea9d'/>
<id>urn:sha1:e81b6abebc87ec40a434ada4ca8d1f2aa16cea9d</id>
<content type='text'>
Atmel SoCs have one or multiple RAM controllers that need one or multiple clocks
to run.
This driver handle those clocks.

Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@free-electrons.com&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
</content>
</entry>
<entry>
<title>memory: ti-aemif: introduce AEMIF driver</title>
<updated>2014-03-01T00:47:21Z</updated>
<author>
<name>Ivan Khoronzhuk</name>
<email>ivan.khoronzhuk@ti.com</email>
</author>
<published>2014-02-24T17:26:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5a7c81547c1db7563afc005a509d1ac38d9e0884'/>
<id>urn:sha1:5a7c81547c1db7563afc005a509d1ac38d9e0884</id>
<content type='text'>
Add new AEMIF driver for EMIF16 Texas Instruments controller.
The EMIF16 module is intended to provide a glue-less interface to
a variety of asynchronous memory devices like ASRA M, NOR and NAND
memory. A total of 256M bytes of any of these memories can be
accessed at any given time via 4 chip selects with 64M byte access
per chip select.

Synchronous memories such as DDR1 SD RAM, SDR SDRAM and Mobile SDR
are not supported.

This controller is used on SoCs like Davinci, Keysone2

Acked-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Signed-off-by: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Signed-off-by: Ivan Khoronzhuk &lt;ivan.khoronzhuk@ti.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>powerpc: select MEMORY for FSL_IFC to not break existing .config files</title>
<updated>2014-02-28T23:27:10Z</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2014-02-19T22:46:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=42d87b184f039e67bf61662258377e7a21403754'/>
<id>urn:sha1:42d87b184f039e67bf61662258377e7a21403754</id>
<content type='text'>
commit d2ae2e20fbdde5a65f3a5a153044ab1e5c53f7cc ("driver/memory:Move
Freescale IFC driver to a common driver") introduces this build
regression into the mpc85xx_defconfig:

 drivers/built-in.o: In function `fsl_ifc_nand_remove':
 drivers/mtd/nand/fsl_ifc_nand.c:1147: undefined reference to `fsl_ifc_ctrl_dev'
 drivers/mtd/nand/fsl_ifc_nand.c:1147: undefined reference to `fsl_ifc_ctrl_dev'
 drivers/built-in.o: In function `fsl_ifc_nand_probe':
 drivers/mtd/nand/fsl_ifc_nand.c:1031: undefined reference to `fsl_ifc_ctrl_dev'
 drivers/mtd/nand/fsl_ifc_nand.c:1031: undefined reference to `fsl_ifc_ctrl_dev'
 drivers/built-in.o: In function `match_bank':
 drivers/mtd/nand/fsl_ifc_nand.c:1013: undefined reference to `convert_ifc_address'
 drivers/built-in.o: In function `fsl_ifc_nand_probe':
 drivers/mtd/nand/fsl_ifc_nand.c:1059: undefined reference to `fsl_ifc_ctrl_dev'
 drivers/mtd/nand/fsl_ifc_nand.c:1080: undefined reference to `fsl_ifc_ctrl_dev'
 drivers/mtd/nand/fsl_ifc_nand.c:1069: undefined reference to `fsl_ifc_ctrl_dev'
 drivers/mtd/nand/fsl_ifc_nand.c:1069: undefined reference to `fsl_ifc_ctrl_dev'
 make: *** [vmlinux] Error 1

This happens because there is nothing to descend us into the
drivers/memory directory in the mpc85xx_defconfig.  It wasn't
selecting CONFIG_MEMORY.  So we never built drivers/memory/fsl_ifc.o
and so we have nothing to link the above symbols against.

Since the goal of the original commit was to relocate the driver to
an arch independent location, it only makes sense to relocate the
Kconfig setting there as well.  But that alone won't fix the build
failure; for that we ensure whoever selects FSL_IFC also selects MEMORY.

Cc: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Cc: Scott Wood &lt;scottwood@freescale.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drivers: memory: Introduce Marvell EBU Device Bus driver</title>
<updated>2013-05-21T17:11:56Z</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@free-electrons.com</email>
</author>
<published>2013-04-23T19:21:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3edad321b1bd2e6c8b5f38146c115c8982438f06'/>
<id>urn:sha1:3edad321b1bd2e6c8b5f38146c115c8982438f06</id>
<content type='text'>
Marvell EBU SoCs such as Armada 370/XP, Orion5x (88f5xxx) and
Discovery (mv78xx0) supports a Device Bus controller to access several
kinds of memories and I/O devices (NOR, NAND, SRAM, FPGA).

This commit adds a driver to handle this controller. So far only
Armada 370, Armada XP and Discovery SoCs are supported.

The driver must be registered through a device tree node;
as explained in the binding document.

For each child node in the device tree, this driver will:
  * set timing parameters
  * register a child device
  * setup an address decoding window, using the mbus driver

Keep in mind the address decoding window setup is only a temporary hack.
This code will be removed from this devbus driver as soon as a proper device
tree binding for the mbus driver is added.

Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@free-electrons.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: tegra30: Make MC optional in Kconfig</title>
<updated>2012-05-11T22:22:56Z</updated>
<author>
<name>Hiroshi DOYU</name>
<email>hdoyu@nvidia.com</email>
</author>
<published>2012-05-11T06:56:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=42d1149f75a3d78033f66853796f20340d7b3ee2'/>
<id>urn:sha1:42d1149f75a3d78033f66853796f20340d7b3ee2</id>
<content type='text'>
For bare minimal system.

Signed-off-by: Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: tegra20: Make MC optional in Kconfig</title>
<updated>2012-05-11T22:22:56Z</updated>
<author>
<name>Hiroshi DOYU</name>
<email>hdoyu@nvidia.com</email>
</author>
<published>2012-05-11T06:56:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f0e33f9805625d60dc81f34740f16a6db67e8427'/>
<id>urn:sha1:f0e33f9805625d60dc81f34740f16a6db67e8427</id>
<content type='text'>
For bare minimal system.

Signed-off-by: Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: tegra30: Add Tegra Memory Controller(MC) driver</title>
<updated>2012-05-10T21:46:09Z</updated>
<author>
<name>Hiroshi DOYU</name>
<email>hdoyu@nvidia.com</email>
</author>
<published>2012-05-10T07:42:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=af4681097b23fe9c63a03d774de7c742fa3a920e'/>
<id>urn:sha1:af4681097b23fe9c63a03d774de7c742fa3a920e</id>
<content type='text'>
Tegra Memory Controller(MC) driver for Tegra30
Added to support MC General interrupts, mainly for IOMMU(SMMU).

Signed-off-by: Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: tegra20: Add Tegra Memory Controller(MC) driver</title>
<updated>2012-05-10T21:43:53Z</updated>
<author>
<name>Hiroshi DOYU</name>
<email>hdoyu@nvidia.com</email>
</author>
<published>2012-05-10T07:42:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c542fb79fba4c63aa6e2a27f90373b0516614eca'/>
<id>urn:sha1:c542fb79fba4c63aa6e2a27f90373b0516614eca</id>
<content type='text'>
Tegra Memory Controller(MC) driver for Tegra20
Added to support MC General interrupts, mainly for IOMMU(GART).

Signed-off-by: Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
