linux/drivers/memory/Kconfig, branch v5.8

memory: Add Baikal-T1 L2-cache Control Block driver

2020-05-28T12:17:41Z

Baikal-T1 SoC provides a way to tune the MIPS P5600 CM2 L2-cache performance up. It can be done by changing the L2-RAM Data/Tag/WS latencies in a dedicated register exposed by the system controller. The driver added by this commit provides a dts properties-based and sysfs-based interface for it. The device DT node is supposed to be a child of Baikal-T1 System Controller node. Link: https://lore.kernel.org/r/20200526125928.17096-7-Sergey.Semin@baikalelectronics.ru Signed-off-by: Serge Semin Cc: Alexey Malahov Cc: Paul Burton Cc: Olof Johansson Cc: Rob Herring Cc: linux-mips@vger.kernel.org Cc: soc@kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Arnd Bergmann

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2019-07-20T00:13:56Z

Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms and a couple of the small driver subsystems we merge through our tree: - A driver for SCU (system control) on NXP i.MX8QXP - Qualcomm Always-on Subsystem messaging driver (AOSS QMP) - Qualcomm PM support for MSM8998 - Support for a newer version of DRAM PHY driver for Broadcom (DPFE) - Reset controller support for Bitmain BM1880 - TI SCI (System Control Interface) support for CPU control on AM654 processors - More TI sysc refactoring and rework" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits) reset: remove redundant null check on pointer dev soc: rockchip: work around clang warning dt-bindings: reset: imx7: Fix the spelling of 'indices' soc: imx: Add i.MX8MN SoC driver support soc: aspeed: lpc-ctrl: Fix probe error handling soc: qcom: geni: Add support for ACPI firmware: ti_sci: Fix gcc unused-but-set-variable warning firmware: ti_sci: Use the correct style for SPDX License Identifier soc: imx8: Use existing of_root directly soc: imx8: Fix potential kernel dump in error path firmware/psci: psci_checker: Park kthreads before stopping them memory: move jedec_ddr.h from include/memory to drivers/memory/ memory: move jedec_ddr_data.c from lib/ to drivers/memory/ MAINTAINERS: Remove myself as qcom maintainer soc: aspeed: lpc-ctrl: make parameter optional soc: qcom: apr: Don't use reg for domain id soc: qcom: fix QCOM_AOSS_QMP dependency and build errors memory: tegra: Fix -Wunused-const-variable firmware: tegra: Early resume BPMP soc/tegra: Select pinctrl for Tegra194 ...

memory: Kconfig: Drop dependency on MACH_JZ4780 for jz4780

2019-06-21T14:08:19Z

Depending on MACH_JZ4780 prevent us from creating a generic kernel that works on more than one MIPS board. Instead, we just depend on MIPS being set. Signed-off-by: Paul Cercueil Reviewed-by: Boris Brezillon Signed-off-by: Greg Kroah-Hartman

memory: move jedec_ddr_data.c from lib/ to drivers/memory/

2019-06-17T11:45:17Z

jedec_ddr_data.c exports 3 symbols, and all of them are only referenced from drivers/memory/{emif.c,of_memory.c} drivers/memory/ is a better location than lib/. I removed the Kconfig prompt "JEDEC DDR data" because it is only select'ed by TI_EMIF, and there is no other user. There is no good reason in making it a user-configurable CONFIG option. Signed-off-by: Masahiro Yamada Signed-off-by: Olof Johansson

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46Z

Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

memory: pl353: Add driver for arm pl353 static memory controller

2018-12-13T15:07:04Z

Add driver for arm pl353 static memory controller. This controller is used in Xilinx Zynq SoC for interfacing the NAND and NOR/SRAM memory devices. Signed-off-by: Naga Sureshkumar Relli Reviewed-by: Linus Walleij Signed-off-by: Michal Simek

drivers/memory/Kconfig: Add CONFIG_OF dependency

2018-07-31T07:46:06Z

JZ4780_NEMC doesn't depend on OF, and if OF isn't enabled we get this error: drivers/memory/jz4780-nemc.c: In function ‘jz4780_nemc_num_banks’: drivers/memory/jz4780-nemc.c:72:10: error: implicit declaration of function ‘of_read_number’; did you mean ‘down_read_nested’? [-Werror=implicit-function-declaration] bank = of_read_number(prop, 1); ^~~~~~~~~~~~~~ down_read_nested Make JZ4780_NEMC depend on OF. Fixes: ab99e11062c1 ("memory: jz4780-nemc: Allow selection of this driver when COMPILE_TEST=y") Reported-by: Randy Dunlap Signed-off-by: Anders Roxell Acked-by: Randy Dunlap Signed-off-by: Miquel Raynal

memory: jz4780-nemc: Allow selection of this driver when COMPILE_TEST=y

2018-07-19T21:14:11Z

It just makes maintainers' life easier by allowing them to compile-test this driver without having MACH_JZ4780 enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon Acked-by: Paul Burton Signed-off-by: Miquel Raynal

memory: fsl_ifc: Allow selection of this driver when COMPILE_TEST=y

2018-07-18T08:10:21Z

It just makes maintainers' life easier by allowing them to compile-test this driver without having FSL_SOC, ARCH_LAYERSCAPE or SOC_LS1021A enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal

memory: tegra: Squash tegra20-mc into common tegra-mc driver

2018-04-30T08:10:00Z

Tegra30+ has some minor differences in registers / bits layout compared to Tegra20. Let's squash Tegra20 driver into the common tegra-mc driver in a preparation for the upcoming MC hot reset controls implementation, avoiding code duplication. Note that this currently doesn't report the value of MC_GART_ERROR_REQ because it is located within the GART register area and cannot be safely accessed from the MC driver (this happens to work only by accident). The proper solution is to integrate the GART driver with the MC driver, much like is done for the Tegra SMMU, but that is an invasive change and will be part of a separate patch series. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding