<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/memory/tegra/mc.c, branch v5.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.0'/>
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<updated>2018-11-27T16:54:39Z</updated>
<entry>
<title>memory: Convert to using %pOFn instead of device_node.name</title>
<updated>2018-11-27T16:54:39Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2018-08-28T00:57:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c86f98544f234e64bb53558545782c24e78d5c49'/>
<id>urn:sha1:c86f98544f234e64bb53558545782c24e78d5c49</id>
<content type='text'>
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Cc: Roger Quadros &lt;rogerq@ti.com&gt;
Cc: Kukjin Kim &lt;kgene@kernel.org&gt;
Cc: Jonathan Hunter &lt;jonathanh@nvidia.com&gt;
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Correct driver probe order</title>
<updated>2018-07-10T15:29:15Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-05-26T14:20:35Z</published>
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<id>urn:sha1:1662dd641f596e5517c7b7a23e4f8ddf36741b5f</id>
<content type='text'>
The Reset Controller should be registered in the end of probe, otherwise
Memory Controller device goes away if IRQ requesting fails and the Reset
Controller stays registered. To avoid having to unwind the MC probing in
a case of SMMU probe failure, let's simply print the error message without
failing the MC probe. This allows us to just move the Reset Controller
registering before the SMMU registration, reducing code churning. Also
let's not fail MC probe in a case of Reset Controller registration failure
as it doesn't prevent the MC driver to work.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Register SMMU after MC driver became ready</title>
<updated>2018-05-18T10:31:55Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-05-08T16:55:30Z</published>
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<id>urn:sha1:45a81df06eeb320093b06132870e7ecd646db3f0</id>
<content type='text'>
Memory Controller driver invokes SMMU driver registration and MC's
registers mapping is shared with SMMU. This mapping goes away if MC
driver probing fails after SMMU registration.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Introduce memory client hot reset</title>
<updated>2018-04-30T08:12:21Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-04-13T11:33:49Z</published>
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<id>urn:sha1:20e92462cdfb2772e9d784ec355c90b61ec10222</id>
<content type='text'>
In order to reset busy HW properly, memory controller needs to be
involved, otherwise it is possible to get corrupted memory or hang machine
if HW was reset during DMA. Introduce memory client 'hot reset' that will
be used for resetting of busy HW.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Squash tegra20-mc into common tegra-mc driver</title>
<updated>2018-04-30T08:10:00Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-04-09T19:28:31Z</published>
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<id>urn:sha1:a8d502fd33484ed8c4acc6acae73918844ca6811</id>
<content type='text'>
Tegra30+ has some minor differences in registers / bits layout compared
to Tegra20. Let's squash Tegra20 driver into the common tegra-mc driver
in a preparation for the upcoming MC hot reset controls implementation,
avoiding code duplication.

Note that this currently doesn't report the value of MC_GART_ERROR_REQ
because it is located within the GART register area and cannot be safely
accessed from the MC driver (this happens to work only by accident). The
proper solution is to integrate the GART driver with the MC driver, much
like is done for the Tegra SMMU, but that is an invasive change and will
be part of a separate patch series.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Apply interrupts mask per SoC</title>
<updated>2018-04-27T09:23:04Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-04-09T19:28:29Z</published>
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<id>urn:sha1:1c74d5c0de0c2cc29fef97a19251da2ad6f579bd</id>
<content type='text'>
Currently we are enabling handling of interrupts specific to Tegra124+
which happen to overlap with previous generations. Let's specify
interrupts mask per SoC generation for consistency and in a preparation
of squashing of Tegra20 driver into the common one that will enable
handling of GART faults which may be undesirable by newer generations.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Setup interrupts mask before requesting IRQ</title>
<updated>2018-04-27T09:22:19Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-04-09T19:28:28Z</published>
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<id>urn:sha1:db4a9c1935760c86f2d0a3612c2f6c658c5bb031</id>
<content type='text'>
This avoids unwanted interrupt during MC driver probe.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Do not handle spurious interrupts</title>
<updated>2018-04-27T09:21:52Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-04-09T19:28:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bf3fbdfbec947cdd04b2f2c4bce11534c8786eee'/>
<id>urn:sha1:bf3fbdfbec947cdd04b2f2c4bce11534c8786eee</id>
<content type='text'>
The ISR reads interrupts-enable mask, but doesn't utilize it. Apply the
mask to the interrupt status and don't handle interrupts that MC driver
haven't asked for. Kernel would disable spurious MC IRQ and report the
error. This would happen only in a case of a very severe bug.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: mc: Add missing of_node_put()</title>
<updated>2016-06-14T09:39:39Z</updated>
<author>
<name>Amitoj Kaur Chawla</name>
<email>amitoj1606@gmail.com</email>
</author>
<published>2016-01-25T17:23:07Z</published>
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<id>urn:sha1:55bb1d8355ce91662dc8760f24f578db5a595819</id>
<content type='text'>
for_each_child_of_node() performs an of_node_get() on each iteration, so
to break out of the loop an of_node_put() is required.

Found using Coccinelle. The semantic patch used for this is as follows:

// &lt;smpl&gt;
@@
expression e;
local idexpression n;
@@

 for_each_child_of_node(..., n) {
   ... when != of_node_put(n)
       when != e = n
(
   return n;
|
+  of_node_put(n);
?  return ...;
)
   ...
 }
// &lt;/smpl&gt;

Signed-off-by: Amitoj Kaur Chawla &lt;amitoj1606@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Delete unneeded of_node_put()</title>
<updated>2016-06-14T09:39:39Z</updated>
<author>
<name>Julia Lawall</name>
<email>julia.lawall@lip6.fr</email>
</author>
<published>2015-10-09T17:47:40Z</published>
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<id>urn:sha1:d1122e4b7639941305166628613a42fdf6e16296</id>
<content type='text'>
for_each_child_of_node() performs an of_node_put() on each iteration, so
putting an of_node_put() before a continue results in a double put.

The semantic match that finds this problem is as follows
(http://coccinelle.lip6.fr):

// &lt;smpl&gt;
@@
expression root,e;
local idexpression child;
iterator name for_each_child_of_node;
@@

 for_each_child_of_node(root, child) {
   ... when != of_node_get(child)
*  of_node_put(child);
   ...
*  continue;
}
// &lt;/smpl&gt;

Signed-off-by: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
