<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/memory/tegra/mc.c, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-11-11T13:55:27Z</updated>
<entry>
<title>memory: tegra: Consolidate registers definition into common header</title>
<updated>2019-11-11T13:55:27Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2019-08-11T21:00:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=141bef44e123c101c0da0443ab6b3cfa750f251a'/>
<id>urn:sha1:141bef44e123c101c0da0443ab6b3cfa750f251a</id>
<content type='text'>
The Memory Controller registers definition is sparse and duplicated,
let's consolidate everything into a common place for consistency.

Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Ensure timing control debug features are disabled</title>
<updated>2019-11-11T13:55:27Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2019-08-11T21:00:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=77b7182ff18dd5a83d938ab42772db5cb82c75b8'/>
<id>urn:sha1:77b7182ff18dd5a83d938ab42772db5cb82c75b8</id>
<content type='text'>
Timing control debug features should be disabled at a boot time, but you
never now and hence it's better to disable them explicitly because some of
those features are crucial for the driver to do a proper thing.

Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Introduce Tegra30 EMC driver</title>
<updated>2019-11-11T13:55:27Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2019-08-11T21:00:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e34212c75a68990f7215d64d725c61e57ca70357'/>
<id>urn:sha1:e34212c75a68990f7215d64d725c61e57ca70357</id>
<content type='text'>
Introduce driver for the External Memory Controller (EMC) found on Tegra30
chips, it controls the external DRAM on the board. The purpose of this
driver is to program memory timing for external memory on the EMC clock
rate change.

Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Set DMA mask based on supported address bits</title>
<updated>2019-11-11T13:55:24Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-02-15T15:28:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c4c21f22150ff5bffffb9454ce556ffa047e780d'/>
<id>urn:sha1:c4c21f22150ff5bffffb9454ce556ffa047e780d</id>
<content type='text'>
The memory controller on Tegra124 and later supports 34 or more address
bits. Advertise that by setting the DMA mask based on the number of the
address bits.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500</title>
<updated>2019-06-19T15:09:55Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-04T08:11:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d2912cb15bdda8ba4a5dd73396ad62641af2f520'/>
<id>urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520</id>
<content type='text'>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Replace readl-writel with mc_readl-mc_writel</title>
<updated>2019-04-18T09:36:10Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2019-04-11T22:12:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=48791f972234301a72e4c40745d0abafa0985d2d'/>
<id>urn:sha1:48791f972234301a72e4c40745d0abafa0985d2d</id>
<content type='text'>
There is no need for a memory barriers on reading/writing of register
values as we only care about the read/write order, hence let's use the
common helpers.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Fix integer overflow on tick value calculation</title>
<updated>2019-04-18T09:35:55Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2019-04-11T22:12:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b906c056b6023c390f18347169071193fda57dde'/>
<id>urn:sha1:b906c056b6023c390f18347169071193fda57dde</id>
<content type='text'>
Multiplying the Memory Controller clock rate by the tick count results
in an integer overflow and in result the truncated tick value is being
programmed into hardware, such that the GR3D memory client performance is
reduced by two times.

Cc: stable &lt;stable@vger.kernel.org&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Fix missed registers values latching</title>
<updated>2019-04-18T09:35:38Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2019-04-11T22:12:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=76b959a44c0b9c60cd41627cecb022c78042ad74'/>
<id>urn:sha1:76b959a44c0b9c60cd41627cecb022c78042ad74</id>
<content type='text'>
Some of Memory Controller registers are shadowed and require latching in
order to copy assembly state into the active, MC_EMEM_ARB_CFG is one of
these registers.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Properly spell "tegra"</title>
<updated>2019-04-11T15:58:41Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-04-11T08:48:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cb2b58391e40d0877b1f60023c8be72696ff8511'/>
<id>urn:sha1:cb2b58391e40d0877b1f60023c8be72696ff8511</id>
<content type='text'>
Rename all occurrences of "terga" to "tegra". It's an easy typo to make
and a difficult one to spot.

Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Clean up error messages</title>
<updated>2019-01-16T12:54:13Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:38:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f2dcded1be0d024870b5a4ef8e4a587857f303b4'/>
<id>urn:sha1:f2dcded1be0d024870b5a4ef8e4a587857f303b4</id>
<content type='text'>
Make all messages to start with a lower case and don't unnecessarily go
over 80 chars in the code.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
</feed>
