linux/drivers/mmc, branch v4.0

mmc: pwrseq_simple: fix error path in mmc_pwrseq_simple_alloc

2015-03-19T10:26:35Z

The current error-path code (when gpiod_get_index() reports an error) can never free pwrseq->reset_gpios[0], but might try to tree pwrseq->reset_gpios[-1], which has unfortunate consequences. Signed-off-by: NeilBrown Fixes: 934f1f48330ed695927a51fa068dc5d673f2da19 Acked-by: Javier Martinez Canillas Signed-off-by: Ulf Hansson Reported-by: Srinivas Kandagatla

Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

2015-02-21T20:30:30Z

Pull clock framework updates from Mike Turquette: "The clock framework changes contain the usual driver additions, enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based devices. Additionally the framework core underwent a bit of surgery with two major changes: - The boundary between the clock core and clock providers (e.g clock drivers) is now more well defined with dedicated provider helper functions. struct clk no longer maps 1:1 with the hardware clock but is a true per-user cookie which helps us tracker users of hardware clocks and debug bad behavior. - The addition of rate constraints for clocks. Rate ranges are now supported which are analogous to the voltage ranges in the regulator framework. Unfortunately these changes to the core created some breakeage. We think we fixed it all up but for this reason there are lots of last minute commits trying to undo the damage" * tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits) clk: Only recalculate the rate if needed Revert "clk: mxs: Fix invalid 32-bit access to frac registers" clk: qoriq: Add support for the platform PLL powerpc/corenet: Enable CLK_QORIQ clk: Replace explicit clk assignment with __clk_hw_set_clk clk: Add __clk_hw_set_clk helper function clk: Don't dereference parent clock if is NULL MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr clkdev: Always allocate a struct clk and call __clk_get() w/ CCF clk: shmobile: div6: Avoid division by zero in .round_rate() clk: mxs: Fix invalid 32-bit access to frac registers clk: omap: compile legacy omap3 clocks conditionally clkdev: Export clk_register_clkdev clk: Add rate constraints to clocks clk: remove clk-private.h pci: xgene: do not use clk-private.h arm: omap2+ remove dead clock code clk: Make clk API return per-user struct clk instances clk: tegra: Define PLLD_DSI and remove dsia(b)_mux clk: tegra: Add support for the Tegra132 CAR IP block ...

mmc: sdhci-s3c: solve problem with sleeping in atomic context

2015-02-04T12:39:14Z

This change addresses following problem: [ 2.560726] ------------[ cut here ]------------ [ 2.565341] WARNING: CPU: 0 PID: 1 at kernel/locking/lockdep.c:2744 lockdep_trace_alloc+0xec/0x118() [ 2.574439] DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags)) [ 2.579821] Modules linked in: [ 2.583038] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 3.18.0-next-20141216-00002-g4ff197fc1902-dirty #1318 [ 2.593796] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) [ 2.599892] [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [ 2.607612] [] (show_stack) from [] (dump_stack+0x70/0xbc) [ 2.614822] [] (dump_stack) from [] (warn_slowpath_common+0x74/0xb0) [ 2.622885] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40) [ 2.631569] [] (warn_slowpath_fmt) from [] (lockdep_trace_alloc+0xec/0x118) [ 2.640246] [] (lockdep_trace_alloc) from [] (__kmalloc+0x3c/0x1cc) [ 2.648240] [] (__kmalloc) from [] (clk_fetch_parent_index+0xb8/0xd4) [ 2.656390] [] (clk_fetch_parent_index) from [] (clk_calc_new_rates+0xe0/0x1fc) [ 2.665415] [] (clk_calc_new_rates) from [] (clk_calc_new_rates+0x1b4/0x1fc) [ 2.674181] [] (clk_calc_new_rates) from [] (clk_set_rate+0x50/0xc8) [ 2.682265] [] (clk_set_rate) from [] (sdhci_cmu_set_clock+0x68/0x16c) [ 2.690503] [] (sdhci_cmu_set_clock) from [] (sdhci_do_set_ios+0xf0/0x64c) [ 2.699095] [] (sdhci_do_set_ios) from [] (sdhci_set_ios+0x20/0x2c) [ 2.707080] [] (sdhci_set_ios) from [] (mmc_power_up+0x118/0x1fc) [ 2.714889] [] (mmc_power_up) from [] (mmc_start_host+0x44/0x6c) [ 2.722615] [] (mmc_start_host) from [] (mmc_add_host+0x58/0x7c) [ 2.730341] [] (mmc_add_host) from [] (sdhci_add_host+0x968/0xd94) [ 2.738240] [] (sdhci_add_host) from [] (sdhci_s3c_probe+0x354/0x52c) [ 2.746406] [] (sdhci_s3c_probe) from [] (platform_drv_probe+0x48/0xa4) [ 2.754733] [] (platform_drv_probe) from [] (driver_probe_device+0x13c/0x37c) [ 2.763585] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 2.772003] [] (__driver_attach) from [] (bus_for_each_dev+0x54/0x88) [ 2.780163] [] (bus_for_each_dev) from [] (bus_add_driver+0xe4/0x200) [ 2.788322] [] (bus_add_driver) from [] (driver_register+0x78/0xf4) [ 2.796308] [] (driver_register) from [] (do_one_initcall+0xac/0x1f0) [ 2.804473] [] (do_one_initcall) from [] (kernel_init_freeable+0x10c/0x1d8) [ 2.813153] [] (kernel_init_freeable) from [] (kernel_init+0x28/0x108) [ 2.821398] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) [ 2.828939] ---[ end trace 03cc00e539849d1f ]--- clk_set_rate() tries to take clk's prepare_lock mutex while being in atomic context entered in sdhci_do_set_ios(). The solution is inspired by similar situation in sdhci_set_power() also called from sdhci_do_set_ios(): spin_unlock_irq(&host->lock); mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); spin_lock_irq(&host->lock); Note that since sdhci_s3c_set_clock() sets SDHCI_CLOCK_CARD_EN, proposed change first resets this bit. It is reset anyway (by setting SDHCI_CLOCK_INT_EN bit only) after call to clk_set_rate() in order to wait for the clock to stabilize and is set again as soon as the clock becomes stable. Signed-off-by: Paul Osmialowski Tested-by: Jaehoon Chung Acked-by: Jaehoon Chung Signed-off-by: Ulf Hansson

mmc: pwrseq: add driver for emmc hardware reset

2015-02-04T08:45:09Z

This patch provides a simple mmc-pwrseq-emmc driver, which controls single gpio line. It perform standard eMMC hw reset procedure, as descibed by Jedec 4.4 specification. This procedure is performed just after MMC core enabled power to the given mmc host (to fix possible issues if bootloader has left eMMC card in initialized or unknown state), and before performing complete system reboot (also in case of emergency reboot call). The latter is needed on boards, which doesn't have hardware reset logic connected to emmc card and (limited or broken) ROM bootloaders are unable to read second stage from the emmc card if the card is left in unknown or already initialized state. Signed-off-by: Marek Szyprowski Signed-off-by: Ulf Hansson

mmc: moxart: fix probe logic

2015-02-04T08:42:29Z

Jonas Jensen wanted to submit a patch for these, but apparently forgot about it. I stumbled over this symptom first: drivers/built-in.o: In function `moxart_probe': :(.text+0x2af128): undefined reference to `of_dma_request_slave_channel' This is because of_dma_request_slave_channel is an internal helper and not exported to loadable module. I'm changing the driver to use dma_request_slave_channel_reason() instead. Further problems from inspection: * The remove function must not call kfree on the host pointer, because it is allocated together with the mmc_host. * The clock is never released * The dma_cap_mask_t is completely unused and can be removed * deferred probing does not work if the dma driver is loaded after the mmc driver. This patch should fix all of the above. Signed-off-by: Arnd Bergmann Signed-off-by: Jonas Jensen Signed-off-by: Ulf Hansson

mmc: core: Invoke mmc_pwrseq_post_power_on() prior MMC_POWER_ON state

2015-02-03T19:56:58Z

Host drivers have different ways to sends their "init stream" to the card. Some need to do it as part of a request, some do it from the ->set_ios() callback in the MMC_POWER_ON state and some don't send an "init stream" at all. To be able to use the reset GPIOs from the simple MMC power sequence provider, the card need to be powered and the "init stream" must not have been sent. To cope with these requirements, invoke mmc_pwrseq_post_power_on() prior we change the state to MMC_POWER_ON in mmc_power_up(). Host drivers shall perform power up operations in the MMC_POWER_UP state. Unfortunate three hosts (au1xmmc, cb710-mmc and toshsd) don't conform to this expectation. Instead those ignore the MMC_POWER_UP state and delays their power up operations to the MMC_POWER_ON state. Those hosts needs to change their behavior to enable proper support for the simple MMC power sequence provider. Signed-off-by: Ulf Hansson Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas

Merge branch 'clk-next' into v3.19-rc7

2015-02-02T22:59:38Z

mmc: pwrseq_simple: Add optional reference clock support

2015-01-30T11:10:23Z

Some WLAN chips attached to a SDIO interface, need a reference clock. Since this is very common, extend the prseq_simple driver to support an optional clock that is enabled prior the card power up procedure. Note: the external clock is optional. Thus an error is not returned if the clock is not found. Signed-off-by: Javier Martinez Canillas Signed-off-by: Ulf Hansson

mmc: pwrseq_simple: Extend to support more pins

2015-01-30T11:00:27Z

Many WLAN attached to a SDIO/MMC interface, needs more than one pin for their reset sequence. For example, is very common for chips to have two pins: one for reset and one for power enable. This patch adds support for more reset pins to the pwrseq_simple driver and instead hardcoding a fixed number, it uses the of_gpio_named_count() since the MMC power sequence is only built when CONFIG_OF is enabled. Signed-off-by: Javier Martinez Canillas Signed-off-by: Srinivas Kandagatla Signed-off-by: Ulf Hansson

mmc: Add hardware dependencies for sdhci-pxav3 and sdhci-pxav2

2015-01-30T10:44:42Z

I seem to understand that the sdhci-pxav3 and sdhci-pxav2 drivers are only needed on the MMP architecture. So add a hardware dependency on ARCH_MMP, so that other users don't get to build useless drivers. Signed-off-by: Jean Delvare Cc: Chris Ball Cc: Ulf Hansson Cc: Eric Miao Acked-by: Haojian Zhuang Signed-off-by: Ulf Hansson