<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/net/phy, branch v2.6.37</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v2.6.37</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v2.6.37'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2010-12-10T23:48:43Z</updated>
<entry>
<title>phy: add the IC+ IP1001 driver</title>
<updated>2010-12-10T23:48:43Z</updated>
<author>
<name>Giuseppe CAVALLARO</name>
<email>peppe.cavallaro@st.com</email>
</author>
<published>2010-12-08T23:05:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=377ecca9ba6d98f31517e2322075e94d1be94561'/>
<id>urn:sha1:377ecca9ba6d98f31517e2322075e94d1be94561</id>
<content type='text'>
This patch adds the IC+ IP1001 (Gigabit Ethernet Transceiver) driver.
I've had to add an additional delay (2ns) to adjust RX clock phase at
GMII/ RGMII interface (according to the PHY data-sheet). This helps to
have the RGMII working on some ST platforms.

Signed-off-by: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>of/phylib: Use device tree properties to initialize Marvell PHYs.</title>
<updated>2010-11-22T16:34:23Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2010-11-19T12:13:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cf41a51db89850033efc11c18a5257de810b5417'/>
<id>urn:sha1:cf41a51db89850033efc11c18a5257de810b5417</id>
<content type='text'>
Some aspects of PHY initialization are board dependent, things like
indicator LED connections and some clocking modes cannot be determined
by probing.  The dev_flags element of struct phy_device can be used to
control these things if an appropriate value can be passed from the
Ethernet driver.  We run into problems however if the PHY connections
are specified by the device tree.  There is no way for the Ethernet
driver to know what flags it should pass.

If we are using the device tree, the struct phy_device will be
populated with the device tree node corresponding to the PHY, and we
can extract extra configuration information from there.

The next question is what should the format of that information be?
It is highly device specific, and the device tree representation
should not be tied to any arbitrary kernel defined constants.  A
straight forward representation is just to specify the exact bits that
should be set using the "marvell,reg-init" property:

      phy5: ethernet-phy@5 {
        reg = &lt;5&gt;;
        compatible = "marvell,88e1149r";
        marvell,reg-init =
                /* led[0]:1000, led[1]:100, led[2]:10, led[3]:tx */
                &lt;3 0x10 0 0x5777&gt;, /* Reg 3,16 &lt;- 0x5777 */
                /* mix %:0, led[0123]:drive low off hiZ */
                &lt;3 0x11 0 0x00aa&gt;, /* Reg 3,17 &lt;- 0x00aa */
                /* default blink periods. */
                &lt;3 0x12 0 0x4105&gt;, /* Reg 3,18 &lt;- 0x4105 */
                /* led[4]:rx, led[5]:dplx, led[45]:drive low off hiZ */
                &lt;3 0x13 0 0x0a60&gt;; /* Reg 3,19 &lt;- 0x0a60 */
      };

      phy6: ethernet-phy@6 {
        reg = &lt;6&gt;;
        compatible = "marvell,88e1118";
        marvell,reg-init =
                /* Fix rx and tx clock transition timing */
                &lt;2 0x15 0xffcf 0&gt;, /* Reg 2,21 Clear bits 4, 5 */
                /* Adjust LED drive. */
                &lt;3 0x11 0 0x442a&gt;, /* Reg 3,17 &lt;- 0442a */
                /* irq, blink-activity, blink-link */
                &lt;3 0x10 0 0x0242&gt;; /* Reg 3,16 &lt;- 0x0242 */
      };

The Marvell PHYs have a page select register at register 22 (0x16), we
can specify any register by its page and register number.  These are
the first and second word.  The third word contains a mask to be ANDed
with the existing register value, and the fourth word is ORed with the
result to yield the new register value.  The new marvell_of_reg_init
function leaves the page select register unchanged, so a call to it
can be dropped into the .config_init functions without unduly
affecting the state of the PHY.

If CONFIG_OF_MDIO is not set, there is no of_node, or no
"marvell,reg-init" property, the PHY initialization is unchanged.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Cc: Cyril Chemparathy &lt;cyril@ti.com&gt;
Cc: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Reviewed-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phylib: Add support for Marvell 88E1149R devices.</title>
<updated>2010-11-22T16:34:23Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2010-11-19T11:58:53Z</published>
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<id>urn:sha1:90600732d8b2fbc422bc9c57bdc73513d909367f</id>
<content type='text'>
The 88E1149R is 10/100/1000 quad-gigabit Ethernet PHY.  The
.config_aneg function can be shared with 88E1118, but it needs its own
.config_init.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Cyril Chemparathy &lt;cyril@ti.com&gt;
Cc: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Wolfram Sang &lt;w.sang@pengutronix.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phylib: Use common page register definition for Marvell PHYs.</title>
<updated>2010-11-22T16:34:22Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2010-11-19T11:58:52Z</published>
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<id>urn:sha1:27d916d680e7b324087a75d080f215e7c34a4e8f</id>
<content type='text'>
The definition of the Marvell PHY page register is not specific to
88E1121, so rename the macro to MII_MARVELL_PHY_PAGE, and use it
throughout.

Suggested-by: Cyril Chemparathy &lt;cyril@ti.com&gt;
Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Cyril Chemparathy &lt;cyril@ti.com&gt;
Cc: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy/marvell: rename 88ec048 to 88e1318s and fix mscr1 addr</title>
<updated>2010-10-29T20:50:25Z</updated>
<author>
<name>Cyril Chemparathy</name>
<email>cyril@ti.com</email>
</author>
<published>2010-10-29T20:50:25Z</published>
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<id>urn:sha1:337ac9d5218cc19f40fca13fa4deb3c658c4241b</id>
<content type='text'>
The marvell 88ec048's official part number is 88e1318s.  This patch renames
definitions in the driver to reflect this.

In addition, a minor bug fix has been added to write back the MSCR1 register
value properly.

Signed-off-by: Cyril Chemparathy &lt;cyril@ti.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phylib: make local function static</title>
<updated>2010-10-24T22:07:11Z</updated>
<author>
<name>stephen hemminger</name>
<email>shemminger@vyatta.com</email>
</author>
<published>2010-10-21T08:37:41Z</published>
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<id>urn:sha1:89ff05ec553f3e70b8773c501da01bf7ad952cab</id>
<content type='text'>
The following functions are not used directly by any drivers:
    phy_attach_direct
    phy_device_create
    phy_prepare_link
    genphy_config_advert
    genphy_setup_forced
    phy_config_interrupt
    phy_clear_interrypt
    phy_sanitize_settings
    phy_enable_interrupts
    phy_disable_interrupts

Signed-off-by: Stephen Hemminger &lt;shemminger@vyatta.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy/marvell: fix 88e1121 support</title>
<updated>2010-10-21T10:59:57Z</updated>
<author>
<name>Arnaud Patard</name>
<email>arnaud.patard@rtp-net.org</email>
</author>
<published>2010-10-21T10:59:57Z</published>
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<id>urn:sha1:be8c648051048bc66fbca590d00f3e8543ec32af</id>
<content type='text'>
Commit c477d0447db08068a497e7beb892b2b2a7bff64b added support for RGMII
rx/tx delays except that it ends up clearing rx/tx delays bit for modes
differents that RGMII*ID. Due to this, ethernet is not working anymore
on my guruplug server +. This patch is fixing that.

Signed-off-by: Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>don't let BCM63XX_PHY depend on non-existant symbol</title>
<updated>2010-10-05T07:34:30Z</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2010-10-03T23:43:33Z</published>
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<id>urn:sha1:10ff4c682972bf714c03ea71e169472cdc329a1e</id>
<content type='text'>
The kernel doesn't have a symbol called BCM63XX.  There is a symbol
BCM63XX_ENET (introduced in 9b1fc55a0500, 6 weeks after 09bb9aa0ed that
introduced BCM63XX_PHY), but the driver compiles without that, too.

Cc: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Cc: Florian Fainelli &lt;florian@openwrt.org&gt;
Cc: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net/phy: fix many "defined but unused" warnings</title>
<updated>2010-10-05T07:34:29Z</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2010-10-03T23:43:32Z</published>
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<id>urn:sha1:cf93c94581bab447a5634c6d737c1cf38c080261</id>
<content type='text'>
MODULE_DEVICE_TABLE only expands to something if it's compiled
for a module.  So when building-in support for the phys, the
mdio_device_id tables are unused.  Marking them with __maybe_unused
fixes the following warnings:

	drivers/net/phy/bcm63xx.c:134: warning: 'bcm63xx_tbl' defined but not used
	drivers/net/phy/broadcom.c:933: warning: 'broadcom_tbl' defined but not used
	drivers/net/phy/cicada.c:162: warning: 'cicada_tbl' defined but not used
	drivers/net/phy/davicom.c:222: warning: 'davicom_tbl' defined but not used
	drivers/net/phy/et1011c.c:114: warning: 'et1011c_tbl' defined but not used
	drivers/net/phy/icplus.c:137: warning: 'icplus_tbl' defined but not used
	drivers/net/phy/lxt.c:226: warning: 'lxt_tbl' defined but not used
	drivers/net/phy/marvell.c:724: warning: 'marvell_tbl' defined but not used
	drivers/net/phy/micrel.c:234: warning: 'micrel_tbl' defined but not used
	drivers/net/phy/national.c:154: warning: 'ns_tbl' defined but not used
	drivers/net/phy/qsemi.c:141: warning: 'qs6612_tbl' defined but not used
	drivers/net/phy/realtek.c:82: warning: 'realtek_tbl' defined but not used
	drivers/net/phy/smsc.c:257: warning: 'smsc_tbl' defined but not used
	drivers/net/phy/ste10Xp.c:135: warning: 'ste10Xp_tbl' defined but not used
	drivers/net/phy/vitesse.c:195: warning: 'vitesse_tbl' defined but not used

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phylib: fix PAL state machine restart on resume</title>
<updated>2010-09-14T21:31:03Z</updated>
<author>
<name>Simon Guinot</name>
<email>sguinot@lacie.com</email>
</author>
<published>2010-09-13T22:12:01Z</published>
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<id>urn:sha1:fddd91016d16277a32727ad272cf2edd3d309c90</id>
<content type='text'>
On resume, before starting the PAL state machine, check if the
adjust_link() method is well supplied. If not, this would lead to a
NULL pointer dereference in the phy_state_machine() function.

This scenario can happen if the Ethernet driver call manually the PHY
functions instead of using the PAL state machine. The mv643xx_eth driver
is a such example.

Signed-off-by: Simon Guinot &lt;sguinot@lacie.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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