linux/drivers/net/phy, branch v3.18

net: ptp: fix time stamp matching logic for VLAN packets.

2014-11-12T20:06:17Z

Commit ae5c6c6d "ptp: Classify ptp over ip over vlan packets" changed the code in two drivers that matches time stamps with PTP frames, with the goal of allowing VLAN tagged PTP packets to receive hardware time stamps. However, that commit failed to account for the VLAN header when parsing IPv4 packets. This patch fixes those two drivers to correctly match VLAN tagged IPv4/UDP PTP messages with their time stamps. This patch should also be applied to v3.17. Signed-off-by: Richard Cochran Signed-off-by: David S. Miller

net: phy: Correctly handle MII ioctl which changes autonegotiation.

2014-11-11T21:21:26Z

When advertised capabilities are changed with mii-tool, such as: mii-tool -A 10baseT the existing handler has two errors. - An actual PHY register value is provided by mii-tool, and this must be mapped to internal state with mii_adv_to_ethtool_adv_t(). - The PHY state machine needs to be told that autonegotiation has again been performed. If not, the MAC will not be notified of the new link speed and duplex, resulting in a possible config mismatch. Signed-off-by: Brian Hill Acked-by: Florian Fainelli Signed-off-by: David S. Miller

net: phy: Add SGMII Configuration for Marvell 88E1145 Initialization

2014-10-28T21:00:22Z

Marvell phy 88E1145 configuration & initialization was missing a case for initializing SGMII mode. This patch adds that case. Signed-off-by: Vince Bridgers Signed-off-by: David S. Miller

phy/micrel: KSZ8031RNL RMII clock reconfiguration bug

2014-10-14T16:41:03Z

Bug: Unable to send and receive Ethernet packets with Micrel PHY. Affected devices: KSZ8031RNL (commercial temp) KSZ8031RNLI (industrial temp) Description: PHY device is correctly detected during probe. PHY power-up default is 25MHz crystal clock input and output 50MHz RMII clock to MAC. Reconfiguration of PHY to input 50MHz RMII clock from MAC causes PHY to become unresponsive if clock source is changed after Operation Mode Strap Override (OMSO) register setup. Cause: Long lead times on parts where clock setup match circuit design forces the usage of similar parts with wrong default setup. Solution: Swapped KSZ8031 register setup and added phy_write return code validation. Tested with Freescale i.MX28 Fast Ethernet Controler (fec). Signed-off-by: Bruno Thomsen Signed-off-by: David S. Miller

net/phy: micrel: Add clock support for KSZ8021/KSZ8031

2014-10-10T19:35:13Z

The KSZ8021 and KSZ8031 support RMII reference input clocks of 25MHz and 50MHz. Both PHYs differ in the default frequency they expect after reset. If this differs from the actual input clock, then register 0x1f bit 7 must be changed. Signed-off-by: Sascha Hauer Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller

net: phy: adjust fixed_phy_register() return value

2014-10-07T17:06:45Z

Adjust fixed_phy_register() to return struct phy_device *, so that it becomes easy to use fixed PHYs without device tree support: phydev = fixed_phy_register(PHY_POLL, &fixed_phy_status, NULL); fixed_phy_set_link_update(phydev, fixed_phy_link_update); phy_connect_direct(netdev, phydev, handler_fn, phy_interface); This change is a prerequisite for modifying bcmgenet driver to work without a device tree on Broadcom's MIPS-based 7xxx platforms. Signed-off-by: Petri Gynther Signed-off-by: David S. Miller

drivers/net/phy/Kconfig: Let MDIO_BCM_UNIMAC depend on HAS_IOMEM

2014-10-06T04:46:27Z

MDIO_BCM_UNIMAC needs HAS_IOMEM, so depend on it, the related error ( with allmodconfig under um): MODPOST 1205 modules ERROR: "devm_ioremap" [drivers/net/phy/mdio-bcm-unimac.ko] undefined! Signed-off-by: Chen Gang Signed-off-by: David S. Miller

net: phy: add BCM7425 and BCM7429 PHYs

2014-10-02T02:12:48Z

Signed-off-by: Petri Gynther Acked-by: Florian Fainelli Signed-off-by: David S. Miller

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

2014-09-23T16:09:27Z

Conflicts: arch/mips/net/bpf_jit.c drivers/net/can/flexcan.c Both the flexcan and MIPS bpf_jit conflicts were cases of simple overlapping changes. Signed-off-by: David S. Miller

net: phy: bcm7xxx: utilize PHY revision in config_init

2014-09-19T20:27:07Z

Now that the GENET and SF2 drivers have been updated to communicate us what is the revision of the BCM7xxx integrated PHY, utilize that information in the config_init() callback to call into the appropriate workaround function based on our revision. While at it, we also print the revision and patch level to help debug new chips. Signed-off-by: Florian Fainelli Signed-off-by: David S. Miller