linux/drivers/nvmem, branch v4.11

nvmem: core: Allow getting nvmem cell with a NULL cell id

2017-01-25T10:49:39Z

The nvmem cell with a NULL cell name/id should be the one with no accompanying 'nvmem-cell-names' property, and thus will be the cell at index 0 in the device tree. So, we default to index 0 and update the cell index only when nvmem cell name id exists. Suggested-by: Stephen Boyd Signed-off-by: Vivek Gautam Reviewed-by: Stephen Boyd Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: core: Correct a bunch of function documentations

2017-01-25T10:49:39Z

Correct the documentation for arguments to a number of functions. Signed-off-by: Vivek Gautam Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: core: Allow ignoring length when reading a cell

2017-01-25T10:49:39Z

nvmem_cell_read() API fills in the argument 'len' with the number of bytes read from the cell. Many users don't care about this length value. So allow users to pass a NULL pointer to this len field. Signed-off-by: Vivek Gautam Reviewed-by: Stephen Boyd Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: octop: Add support for imx6ul

2017-01-25T10:49:39Z

i.MX6UL is an new SOC of i.MX6 family. Enable ocotp driver support for this SOC. Signed-off-by: Bai Ping Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: fix nvmem_cell_read() return type doc

2017-01-04T17:22:47Z

nvmem_cell_read() returns void *, not char *. This is a cleanup that got left out of commit a6c50912508d ("nvmem: Declare nvmem_cell_read() consistently"). Signed-off-by: Brian Norris Fixes: a6c50912508d ("nvmem: Declare nvmem_cell_read() consistently") Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: imx-ocotp: Fix wrong register size

2017-01-04T17:22:47Z

All i.MX6 SoCs have an OCOTP Controller with 4kbit fuses. The i.MX6SL is an exception and has only 2kbit fuses. In the TRM for the i.MX6DQ (IMX6QDRM - Rev 2, 06/2014) the fuses size is described in chapter 46.1.1 with: "32-bit word restricted program and read to 4Kbits of eFuse OTP(512x8)." In the TRM for the i.MX6SL (IMX6SLRM - Rev 2, 06/2015) the fuses size is described in chapter 34.1.1 with: "32-bit word restricted program and read to 2 kbit of eFuse OTP(128x8)." Since the Freescale Linux kernel OCOTP driver works with a fuses size of 2 kbit for the i.MX6SL, it looks like the TRM is wrong and the formula to calculate the correct fuses size has to be 256x8. Signed-off-by: Daniel Schultz Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: qfprom: Allow single byte accesses for read/write

2017-01-04T17:22:47Z

The nvmem core driver supports to read and write single byte. So, allow qfprom to support this feature. This change helps in extracting a required value based on bit-offset and number of bits for the required value in the nvmem cell. Signed-off-by: Vivek Gautam Cc: Srinivas Kandagatla Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: Add the Broadcom OTP controller driver

2016-11-10T14:34:56Z

Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP controller. These controllers are used on SoC's such as Cygnus and Stingray. Reviewed-by: Ray Jui Tested-by: Jonathan Richardson Signed-off-by: Scott Branden Signed-off-by: Oza Pawandeep Signed-off-by: Jonathan Richardson Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

nvmem: add NXP LPC18xx OTP driver

2016-11-10T14:34:55Z

Add simple read only driver for the internal OTP (One Time Programmable) memory found on all NXP LPC18xx and LPC43xx devices. The OTP memory is split into 4 banks each with 4 32-bits word. Some of the banks contain predefined data while others are for general purpose and user programmable via the OTP API in ROM. Note that writing to the OTP memory is not yet supported. Signed-off-by: Joachim Eastwood Tested-by: Vladimir Zapolskiy Signed-off-by: Srinivas Kandagatla Signed-off-by: Greg Kroah-Hartman

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2016-10-08T04:23:40Z

Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs, including a couple of newly added drivers: - The Qualcomm external bus interface 2 (EBI2), used in some of their mobile phone chips for connecting flash memory, LCD displays or other peripherals - Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for the EFUSE based on that firmware interface. - Perf support for the AppliedMicro X-Gene performance monitor unit - Reset driver for STMicroelectronics STM32 - Reset driver for SocioNext UniPhier SoCs Aside from these, there are minor updates to SoC-specific bus, clocksource, firmware, pinctrl, reset, rtc and pmic drivers" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits) bus: qcom-ebi2: depend on HAS_IOMEM pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181 clk: mvebu: Add clk support for the orion5x SoC mv88f5181 dt-bindings: EXYNOS: Add Exynos5433 PMU compatible clocksource: exynos_mct: Add the support for ARM64 perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver Documentation: Add documentation for APM X-Gene SoC PMU DTS binding MAINTAINERS: Add entry for APM X-Gene SoC PMU driver bus: qcom: add EBI2 driver bus: qcom: add EBI2 device tree bindings rtc: rtc-pm8xxx: Add support for pm8018 rtc nvmem: amlogic: Add Amlogic Meson EFUSE driver firmware: Amlogic: Add secure monitor driver soc: qcom: smd: Reset rx tail rather than tx memory: atmel-sdramc: fix a possible NULL dereference reset: hi6220: allow to compile test driver on other architectures reset: zynq: add driver Kconfig option reset: sunxi: add driver Kconfig option reset: stm32: add driver Kconfig option reset: socfpga: add driver Kconfig option ...