<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/phy/Makefile, branch v3.18</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v3.18</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v3.18'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2014-09-24T09:48:33Z</updated>
<entry>
<title>phy: phy-stih41x-usb: Add usb phy support for STiH41x SoCs.</title>
<updated>2014-09-24T09:48:33Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2014-09-08T10:33:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3f8da2e36c04577a39dc210255f53bdc9e4ca0e4'/>
<id>urn:sha1:3f8da2e36c04577a39dc210255f53bdc9e4ca0e4</id>
<content type='text'>
This driver adds support for USB (1.1 and 2.0) phy for STiH415 and
STiH416 System-On-Chips from STMicroelectronics.

Signed-off-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: phy-stih407-usb: Add usb picoPHY driver found on stih407 SoC family</title>
<updated>2014-09-24T09:48:33Z</updated>
<author>
<name>Peter Griffin</name>
<email>peter.griffin@linaro.org</email>
</author>
<published>2014-09-11T17:02:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=89ae1f5d4c9a62dd32e14d5edfb7221d2f73039e'/>
<id>urn:sha1:89ae1f5d4c9a62dd32e14d5edfb7221d2f73039e</id>
<content type='text'>
This is the generic phy driver for the picoPHY ports used by the
USB2 and USB3 Host controllers when controlling usb2/1.1 devices. It
is found on STiH407 SoC family from STMicroelectronics.

Signed-off-by: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Signed-off-by: Peter Griffin &lt;peter.griffin@linaro.org&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: Renesas R-Car Gen2 PHY driver</title>
<updated>2014-09-24T09:48:31Z</updated>
<author>
<name>Sergei Shtylyov</name>
<email>sergei.shtylyov@cogentembedded.com</email>
</author>
<published>2014-07-22T19:27:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1233f59f745b237d85f12aa9cf12ffab469f322d'/>
<id>urn:sha1:1233f59f745b237d85f12aa9cf12ffab469f322d</id>
<content type='text'>
This PHY, though formally being a part of Renesas USBHS controller, contains the
UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls them
channels) to the different USB controllers: channel 0 can be connected to either
PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI EHCI/OHCI
or xHCI controllers.

This is a new driver for this USB PHY currently already supported under drivers/
usb/phy/. The reason for writing the new driver was the requirement that the
multiplexing  of USB channels to the controller be dynamic, depending on what
USB drivers  are loaded,  rather than static as provided by the old driver. The
infrastructure provided by drivers/phy/phy-core.c  seems to fit that purpose
ideally. The new driver only  supports device tree probing  for now.

Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2014-08-08T18:34:32Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-08-08T18:34:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=10c8e0562057b5d64ea170feab148e1550420030'/>
<id>urn:sha1:10c8e0562057b5d64ea170feab148e1550420030</id>
<content type='text'>
Pull ARM SoC driver changes from Olof Johansson:
 "A handful of driver-related changes.  We've had a bunch of them going
  in through other branches as well, so it's only a part of what we
  really have this release.

  Larger pieces are:

   - Removal of a now unused PWM driver for atmel
     [ This includes AVR32 changes that have been appropriately acked ]
   - Performance counter support for the arm CCN interconnect
   - OMAP mailbox driver cleanups and consolidation
   - PCI and SATA PHY drivers for SPEAr 13xx platforms
   - Redefinition (with backwards compatibility!) of PCI DT bindings for
     Tegra to better model regulators/power"

Note: this merge also fixes up the semantic conflict with the new
calling convention for devm_phy_create(), see commit f0ed817638b5 ("phy:
core: Let node ptr of PHY point to PHY and not of PHY provider") that
came in through Greg's USB tree.

Semantic merge patch by Stephen Rothwell &lt;sfr@canb.auug.org.au&gt; through
the next tree.

* tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  bus: arm-ccn: Fix error handling at event allocation
  mailbox/omap: add a parent structure for every IP instance
  mailbox/omap: remove the private mailbox structure
  mailbox/omap: consolidate OMAP mailbox driver
  mailbox/omap: simplify the fifo assignment by using macros
  mailbox/omap: remove omap_mbox_type_t from mailbox ops
  mailbox/omap: remove OMAP1 mailbox driver
  mailbox/omap: use devm_* interfaces
  bus: ARM CCN: add PERF_EVENTS dependency
  bus: ARM CCN PMU driver
  PCI: spear: Remove spear13xx_pcie_remove()
  PCI: spear: Fix Section mismatch compilation warning for probe()
  ARM: tegra: Remove legacy PCIe power supply properties
  PCI: tegra: Remove deprecated power supply properties
  PCI: tegra: Implement accurate power supply scheme
  ARM: SPEAr13xx: Update defconfigs
  ARM: SPEAr13xx: Add pcie and miphy DT nodes
  ARM: SPEAr13xx: Add bindings and dt node for misc block
  ARM: SPEAr13xx: Fix static mapping table
  phy: Add drivers for PCIe and SATA phy on SPEAr13xx
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2014-08-08T18:14:29Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-08-08T18:14:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b3345d7c57d70e6cb6749af25cdbe80515582e99'/>
<id>urn:sha1:b3345d7c57d70e6cb6749af25cdbe80515582e99</id>
<content type='text'>
Pull ARM SoC platform changes from Olof Johansson:
 "This is the bulk of new SoC enablement and other platform changes for
  3.17:

   - Samsung S5PV210 has been converted to DT and multiplatform
   - Clock drivers and bindings for some of the lower-end i.MX 1/2
     platforms
   - Kirkwood, one of the popular Marvell platforms, is folded into the
     mvebu platform code, removing mach-kirkwood
   - Hwmod data for TI AM43xx and DRA7 platforms
   - More additions of Renesas shmobile platform support
   - Removal of plat-samsung contents that can be removed with S5PV210
     being multiplatform/DT-enabled and the other two old platforms
     being removed

  New platforms (most with only basic support right now):

   - Hisilicon X5HD2 settop box chipset is introduced
   - Mediatek MT6589 (mobile chipset) is introduced
   - Broadcom BCM7xxx settop box chipset is introduced

  + as usual a lot other pieces all over the platform code"

* tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits)
  ARM: hisi: remove smp from machine descriptor
  power: reset: move hisilicon reboot code
  ARM: dts: Add hix5hd2-dkb dts file.
  ARM: debug: Rename Hi3716 to HIX5HD2
  ARM: hisi: enable hix5hd2 SoC
  ARM: hisi: add ARCH_HISI
  MAINTAINERS: add entry for Broadcom ARM STB architecture
  ARM: brcmstb: select GISB arbiter and interrupt drivers
  ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
  ARM: configs: enable SMP in bcm_defconfig
  ARM: add SMP support for Broadcom mobile SoCs
  Documentation: arm: misc updates to Marvell EBU SoC status
  Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
  ARM: mvebu: fix build without platforms selected
  ARM: mvebu: add cpuidle support for Armada 38x
  ARM: mvebu: add cpuidle support for Armada 370
  cpuidle: mvebu: add Armada 38x support
  cpuidle: mvebu: add Armada 370 support
  cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
  ARM: mvebu: export the SCU address
  ...
</content>
</entry>
<entry>
<title>phy: miphy365x: Provide support for the MiPHY356x Generic PHY</title>
<updated>2014-07-22T07:16:37Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2014-07-09T11:41:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6e877fedb1cff0f4a0988d30418ad87abaefafcb'/>
<id>urn:sha1:6e877fedb1cff0f4a0988d30418ad87abaefafcb</id>
<content type='text'>
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.

Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Alexandre Torgue &lt;alexandre.torgue@st.com&gt;
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: qcom: Add driver for QCOM IPQ806x SATA PHY</title>
<updated>2014-07-22T07:16:12Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@codeaurora.org</email>
</author>
<published>2014-07-16T16:10:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4f6160d4089ec0e39e33a197138413bd0701ce21'/>
<id>urn:sha1:4f6160d4089ec0e39e33a197138413bd0701ce21</id>
<content type='text'>
Add a PHY driver for uses with AHCI based SATA controller driver on the
IPQ806x family of SoCs.

Signed-off-by: Kumar Gala &lt;galak@codeaurora.org&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: add a driver for the Berlin SATA PHY</title>
<updated>2014-07-22T07:16:11Z</updated>
<author>
<name>Antoine Ténart</name>
<email>antoine.tenart@free-electrons.com</email>
</author>
<published>2014-07-07T10:16:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=942a31b521911b0f162a37844c29f91022d129f0'/>
<id>urn:sha1:942a31b521911b0f162a37844c29f91022d129f0</id>
<content type='text'>
The Berlin SoC has a two SATA ports. Add a PHY driver to handle them.

The mode selection can let us think this PHY can be configured to fit
other purposes. But there are reasons to think the SATA mode will be
the only one usable: the PHY registers are only accessible indirectly
through two registers in the SATA range, the PHY seems to be integrated
and no information tells us the contrary. For these reasons, make the
driver a SATA PHY driver.

Signed-off-by: Antoine Ténart &lt;antoine.tenart@free-electrons.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: qcom: Add driver for QCOM APQ8064 SATA PHY</title>
<updated>2014-07-22T07:16:11Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2014-07-14T11:17:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1de990d8a169de8aa971cea650e5dec6cdf62a09'/>
<id>urn:sha1:1de990d8a169de8aa971cea650e5dec6cdf62a09</id>
<content type='text'>
Add a PHY driver for uses with AHCI based SATA controller driver on the
APQ8064 family of SoCs.

This patch is a forward port from Qualcomm's v3.4 andriod kernel.

Tested on IFC6410 board.

CC: Sujit Reddy Thumma &lt;sthumma@codeaurora.org&gt;
Tested-by: Kiran Padwal &lt;kiran.padwal@smartplayin.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: add hix5hd2-sata-phy driver</title>
<updated>2014-07-22T07:16:10Z</updated>
<author>
<name>Jiancheng Xue</name>
<email>xuejiancheng@huawei.com</email>
</author>
<published>2014-07-03T14:28:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e379413a346ce5943ab895aa5a702ec752577f13'/>
<id>urn:sha1:e379413a346ce5943ab895aa5a702ec752577f13</id>
<content type='text'>
Add hix5hd2-sata-phy driver on Hisilicon hix5hd2 soc.

Signed-off-by: Jiancheng Xue &lt;xuejiancheng@huawei.com&gt;
Signed-off-by: Zhangfei Gao &lt;zhangfei.gao@linaro.org&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
</feed>
