linux/drivers/phy/broadcom, branch v5.7

phy: brcm-sata: Correct MDIO operations for 40nm platforms

2020-02-21T08:31:47Z

The logic to write to MDIO registers on 40nm platforms was wrong because it would use the port number as an offset from the base address rather than the bank address of the PHY. This is hardly noticeable because the only programming we do is enabling SSC or not, which is not really causing an observable functional change. Correct that mistake by passing down the struct brcm_sata_port structure down to the brcm_sata_mdio_wr() and brcm_sata_mdio_rd() functions and do the proper offsetting for 28nm, respectively 40nm platforms from there. This means that brcm_sata_pcb_base() is now useless and is therefore removed. Fixes: c1602a1a0fbe ("phy: phy_brcmstb_sata: add support for MIPS-based platforms") Signed-off-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: Enable compile testing for some of drivers

2020-01-14T05:20:19Z

Some of the phy drivers can be compile tested to increase build coverage. Signed-off-by: Krzysztof Kozlowski Acked-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: Add support for wake and USB low power mode for 7211 S2/S5

2020-01-08T07:28:06Z

Add support for 7211 USB wake. Disable all possible 7211 USB logic for S2/S5 if USB wake is not enabled. On the 7211, the XHCI wake signal was not connected properly and only goes to the USB1_USB1_CTRL_TP_DIAG1 diagonstic register. The workaround is to have VPU code running that polls for the proper bit in the DIAG register and to wake the system when the bit is asserted. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: USB driver is crashing during S3 resume on 7216

2020-01-08T07:28:06Z

This is a result of the USB 2.0 clocks not being disabled/enabled during suspend/resume on XHCI only systems. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: bdc: Fix occasional failure with BDC on 7211

2020-01-08T07:28:06Z

The BDC "Read Transaction Size" needs to be changed from 1024 bytes to 256 bytes to prevent occasional transaction failures. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: PHY's MDIO registers not accessible without device installed

2020-01-08T07:28:06Z

When there is no device connected and FSM is enabled, the XHCI puts the PHY into suspend mode. When the PHY is put into suspend mode the USB LDO powers down the PHY. This causes the MDIO to be inaccessible and its registers reset to default. The fix is to disable FSM. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: fix driver to defer on clk_get defer

2020-01-08T07:28:06Z

Handle defer on clk_get because the new SCMI clock driver comes up after this driver. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: Add support for new Synopsys USB controller on the 7211b0

2020-01-08T07:28:06Z

The 7211b0 has added the STB XHCI Synopsys controller and it will be used instead of the RPi based DWC USB controller. The new Synopsys XHCI controller core is the same one that is used on the 7216, but because of the way the STB USB PHY is used on both the A0 and B0, some of the PHY control is different. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: Add support for new Synopsys USB controller on the 7216

2020-01-08T07:28:06Z

The 7216 has the new USB XHCI controller from Synopsys. While this new controller and the PHY are similar to the STB versions, the major differences are: - Many of the registers and fields in the CTRL block have been removed or changed. - A new set of Synopsys control registers, BCHP_USB_XHCI_GBL, were added. - MDIO functionality has been replaced with direct access registers in the BCHP_USB_XHCI_GBL block. - Power up PHY defaults that had to be changed by MDIO in previous chips will now power up with the correct defaults. A new init module was created for this new Synopsys USB controller. A new compatible string was added and the driver will dispatch into one of two init modules based on it. A "reg-names" field was added so the driver can more easily get optional registers. A DT bindings document was also added for this driver. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I

phy: usb: Restructure in preparation for adding 7216 USB support

2020-01-08T07:28:06Z

The driver is being restructured in preparation for adding support for the new Synopsys USB conroller on the 7216. Since all the bugs and work-arounds in previous STB chips are supposed to be fixed, most of the code in phy-brcm-usb-init.c is not needed. Instead of adding more complexity to the already complicated phy-brcm-usb-init.c module, the driver will be restructured to use a vector table to dispatch into different C modules for the different controllers. There was also some general cleanup done including some ipp setup code that was incorrect. Signed-off-by: Al Cooper Reviewed-by: Florian Fainelli Signed-off-by: Kishon Vijay Abraham I