<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/phy/qualcomm, branch v6.4</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.4</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.4'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-05-16T14:18:55Z</updated>
<entry>
<title>phy: qcom-snps: correct struct qcom_snps_hsphy kerneldoc</title>
<updated>2023-05-16T14:18:55Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-05-07T14:48:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2a881183dc5ab2474ef602e48fe7af34db460d95'/>
<id>urn:sha1:2a881183dc5ab2474ef602e48fe7af34db460d95</id>
<content type='text'>
Update kerneldoc of struct qcom_snps_hsphy to fix:

  drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c:135: warning: Function parameter or member 'update_seq_cfg' not described in 'qcom_snps_hsphy'

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20230507144818.193039-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-pcie-msm8996: fix init-count imbalance</title>
<updated>2023-05-08T09:09:42Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2023-05-02T10:38:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e42f110700ed7293700c26145e1ed07ea05ac3f6'/>
<id>urn:sha1:e42f110700ed7293700c26145e1ed07ea05ac3f6</id>
<content type='text'>
The init counter is not decremented on initialisation errors, which
prevents retrying initialisation.

Add the missing decrement on initialisation errors so that the counter
reflects the state of the device.

Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org      # 4.12
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/r/20230502103810.12061-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-combo: fix init-count imbalance</title>
<updated>2023-05-08T09:09:42Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2023-05-02T10:38:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9bf03a0cbd80a256bc1e1c4bcc80bc2b06b8b2b9'/>
<id>urn:sha1:9bf03a0cbd80a256bc1e1c4bcc80bc2b06b8b2b9</id>
<content type='text'>
The init counter is not decremented on initialisation errors, which
prevents retrying initialisation and can lead to the runtime suspend
callback attempting to disable resources that have never been enabled.

Add the missing decrement on initialisation errors so that the counter
reflects the state of the device.

Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org	# 4.12
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/r/20230502103810.12061-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qualcomm: phy-qcom-qmp-ufs: add definitions for sa8775p</title>
<updated>2023-04-12T16:15:29Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@linaro.org</email>
</author>
<published>2023-04-11T13:04:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=607c101fe9f2f618ef8db9f9b589a365125c16ee'/>
<id>urn:sha1:607c101fe9f2f618ef8db9f9b589a365125c16ee</id>
<content type='text'>
Add QMP PHY config for sa8775p and add support for the new compatible.

Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Link: https://lore.kernel.org/r/20230411130446.401440-4-brgl@bgdev.pl
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-pcie: drop sdm845_qhp_pcie_rx_tbl</title>
<updated>2023-04-10T15:18:00Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2023-03-31T15:12:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=813a2398907c2f8b94afc5d5f80e0f581b585a45'/>
<id>urn:sha1:813a2398907c2f8b94afc5d5f80e0f581b585a45</id>
<content type='text'>
The SDM845 QHP PHY doesn't have designated RX region. Corresponding RX
table is empty, so we can drop it completely.

Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20230331151250.4049-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-pcie: sc8180x PCIe PHY has 2 lanes</title>
<updated>2023-04-10T15:18:00Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2023-03-31T15:12:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1db6b0a4246ce708b89f5136571130b9987741d1'/>
<id>urn:sha1:1db6b0a4246ce708b89f5136571130b9987741d1</id>
<content type='text'>
All PCIe PHYs on sc8180x platform have 2 lanes, so change the number of
lanes to 2.

Fixes: f839f14e24f2 ("phy: qcom-qmp: Add sc8180x PCIe support")
Cc: stable@vger.kernel.org # 5.15
Sgned-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/r/20230331151250.4049-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-ufs: Add SM7150 support</title>
<updated>2023-03-31T13:56:25Z</updated>
<author>
<name>David Wronek</name>
<email>davidwronek@gmail.com</email>
</author>
<published>2023-03-11T23:17:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=868c2a6ceead022aa61b94b7173c177cf0169be2'/>
<id>urn:sha1:868c2a6ceead022aa61b94b7173c177cf0169be2</id>
<content type='text'>
Add the tables and constants for init sequences for UFS QMP phy found in
SM7150 SoC.

Signed-off-by: David Wronek &lt;davidwronek@gmail.com&gt;
Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/r/20230311231733.141806-3-danila@jiaxyga.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: Add support for SDX65 QMP PCIe PHY</title>
<updated>2023-03-31T13:54:24Z</updated>
<author>
<name>Rohit Agarwal</name>
<email>quic_rohiagar@quicinc.com</email>
</author>
<published>2023-03-17T06:38:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=92bd868f529a7771f15a141e8db6b6b62b32310a'/>
<id>urn:sha1:92bd868f529a7771f15a141e8db6b6b62b32310a</id>
<content type='text'>
The PCIe PHY version used in SDX65 is v5.20 which has different register
offsets compared to the v5.0x and v4.0x PHYs. So separate register defines are
used for init sequence and PHY status.

Signed-off-by: Rohit Agarwal &lt;quic_rohiagar@quicinc.com&gt;
Link: https://lore.kernel.org/r/1679035114-19879-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-combo: use qmp_combo_offsets_v3 instead of _v6</title>
<updated>2023-03-31T13:49:11Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2023-03-23T14:47:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=eb016875080cf035f588fa31c7d1e43dfe462451'/>
<id>urn:sha1:eb016875080cf035f588fa31c7d1e43dfe462451</id>
<content type='text'>
The qmp_combo_offsets_v3 table is already used for v3 and v4 PHYs. Reuse
it for v6 too, dropping the separate qmp_combo_offsets_v6.

Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20230323144726.1614344-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-combo: fix v3 offsets table</title>
<updated>2023-03-31T13:49:10Z</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2023-03-23T14:47:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4546334fc14fc1176384c7c7a426be9fef738c3e'/>
<id>urn:sha1:4546334fc14fc1176384c7c7a426be9fef738c3e</id>
<content type='text'>
SM8350 and SM8450 use qmp_combo_offsets_v3 table, which doesn't have
PCS_USB offset. Add the usb3_pcs_usb entry to program correct registers
while setting up sm8350 and sm8450 USB+DP combo PHYs.

Fixes: 05bd18348b88 ("phy: qcom-qmp-combo: Add config for SM6350")
Cc: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://lore.kernel.org/r/20230323144726.1614344-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
</feed>
