<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/pinctrl/intel, branch v4.4</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.4</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.4'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2015-12-10T22:01:42Z</updated>
<entry>
<title>pinctrl: intel: fix offset calculation issue of register PAD_OWN</title>
<updated>2015-12-10T22:01:42Z</updated>
<author>
<name>Qipeng Zha</name>
<email>qipeng.zha@intel.com</email>
</author>
<published>2015-11-30T11:20:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=99a735b3c287b70aa67952b1ff3d85cd924d85f9'/>
<id>urn:sha1:99a735b3c287b70aa67952b1ff3d85cd924d85f9</id>
<content type='text'>
The calculation equation of PAD_OWN register offset is not
correct for Broxton, verified this fix will get right
offset for Broxton.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: fix bug of register offset calculation</title>
<updated>2015-12-10T22:01:41Z</updated>
<author>
<name>Qipeng Zha</name>
<email>qipeng.zha@intel.com</email>
</author>
<published>2015-11-25T17:09:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=618a919b4c5150408c26f8b4527851f7065f841c'/>
<id>urn:sha1:618a919b4c5150408c26f8b4527851f7065f841c</id>
<content type='text'>
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS,
GPI_IE, are not 24 for Broxton, Add a parameter to allow
different platform to set correct value.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio</title>
<updated>2015-11-02T20:59:12Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-11-02T20:59:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e86328c489d7ecdca99410a06a3f448caf7857bf'/>
<id>urn:sha1:e86328c489d7ecdca99410a06a3f448caf7857bf</id>
<content type='text'>
Pull GPIO updates from Linus Walleij:
 "Here is the bulk of GPIO changes for the v4.4 development cycle.

  The only changes hitting outside drivers/gpio are in the pin control
  subsystem and these seem to have settled nicely in linux-next.

  Development mistakes and catfights are nicely documented in the
  reverts as you can see.  The outcome of the ABI fight is that we're
  working on a chardev ABI for GPIO now, where hope to show results for
  the v4.5 kernel.

  Summary of changes:

  GPIO core:
   - Define and handle flags for open drain/open collector and open
     source/open emitter, also know as "single-ended" configurations.
   - Generic request/free operations that handle calling out to the
     (optional) pin control backend.
   - Some refactoring related to an ABI change that did not happen, yet
     provide useful.
   - Added a real-time compliance checklist.  Many GPIO chips have
     irqchips, and need to think this over with the RT patches going
     upstream.
   - Restructure, fix and clean up Kconfig menus a bit.

  New drivers:
   - New driver for AMD Promony.
   - New driver for ACCES 104-IDIO-16, a port-mapped I/O card,
     ISA-style.  Very retro.

  Subdriver changes:
   - OMAP changes to handle real time requirements.
   - Handle trigger types for edge and level IRQs on PL061 properly.  As
     this hardware is very common it needs to set a proper example for
     others to follow.
   - Some container_of() cleanups.
   - Delete the unused MSM driver in favor of the driver that is
     embedded inside the pin control driver.
   - Cleanup of the ath79 GPIO driver used by many, many OpenWRT router
     targets.
   - A consolidated IT87xx driver replacing the earlier very specific
     IT8761e driver.
   - Handle the TI TCA9539 in the PCA953x driver.  Also handle ACPI
     devices in this subdriver.
   - Drop xilinx arch dependencies as these FPGAs seem to profilate over
     a few different architectures.  MIPS and ARM come to mind"

* tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (57 commits)
  gpio: fix up SPI submenu
  gpio: drop surplus I2C dependencies
  gpio: drop surplus X86 dependencies
  gpio: dt-bindings: document the official use of "ngpios"
  gpio: MAINTAINERS: Add an entry for the ATH79 GPIO driver
  gpio / ACPI: Allow shared GPIO event to be read via operation region
  gpio: group port-mapped I/O drivers in a menu
  gpio: Add ACCES 104-IDIO-16 driver maintainer entry
  gpio: zynq: Document interrupt-controller DT binding
  gpio: xilinx: Drop architecture dependencies
  gpio: generic: Revert to old error handling in bgpio_map
  gpio: add a real time compliance notes
  Revert "gpio: add a real time compliance checklist"
  gpio: Add GPIO support for the ACCES 104-IDIO-16
  gpio: driver for AMD Promontory
  gpio: xlp: Convert to use gpiolib irqchip helpers
  gpio: add a real time compliance checklist
  gpio/xilinx: enable for MIPS
  gpiolib: Add and use OF_GPIO_SINGLE_ENDED flag
  gpiolib: Split GPIO flags parsing and GPIO configuration
  ...
</content>
</entry>
<entry>
<title>pinctrl: intel: Add Intel Broxton pin controller support</title>
<updated>2015-10-27T12:32:13Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2015-10-21T10:08:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ee1a6ca43dba07465c71f6ab661702d703f5eb06'/>
<id>urn:sha1:ee1a6ca43dba07465c71f6ab661702d703f5eb06</id>
<content type='text'>
This driver adds pinctrl/GPIO support for Intel Broxton. The GPIO
controller is based on the same hardware design that is already used in
Intel Sunrisepoint so we leverage the core driver here.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs</title>
<updated>2015-10-27T12:30:56Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2015-10-21T10:08:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4341e8a5458f10cb7265167061fa06ebf3a3a903'/>
<id>urn:sha1:4341e8a5458f10cb7265167061fa06ebf3a3a903</id>
<content type='text'>
Reserved for ACPI actually means that in such case the GPIO hardware will
not update the interrupt status register (GPI_IS) even if the pin is
configured to trigger an interrupt. It will update GPI_GPE_STS instead and
does not trigger an interrupt.

Allow using such pins as GPIOs, only prevent their usage as interrupts.

We also rename function intel_pad_reserved_for_acpi() to be
intel_pad_acpi_mode() which reflects the actual meaning better.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Add support for multiple GPIO chips sharing the interrupt</title>
<updated>2015-10-27T12:27:49Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2015-10-21T10:08:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=193b40c8258f781d8dc395909b2971472aad6796'/>
<id>urn:sha1:193b40c8258f781d8dc395909b2971472aad6796</id>
<content type='text'>
On Intel Broxton the GPIO hardware consists of several chips that all share
the parent interrupt. It is not possible to handle this by setting chained
handler for each chip (as they will overwrite each other).

To overcome this we need to request the interrupt using devm_request_irq()
and pass IRQF_SHARED with the flags.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: baytrail: Fix compilation warnings when !CONFIG_PM</title>
<updated>2015-10-16T20:54:33Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2015-10-13T14:51:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ec879f1272283c040bc70e1a1fff5edbb547be59'/>
<id>urn:sha1:ec879f1272283c040bc70e1a1fff5edbb547be59</id>
<content type='text'>
When CONFIG_PM is not set we get following compilation warnings:

 warning: â€˜byt_gpio_runtime_suspendâ€™ defined but not used [-Wunused-function]
 warning: â€˜byt_gpio_runtime_resumeâ€™ defined but not used [-Wunused-function]

Fix this by guarding byt_gpio_runtime_suspend()/byt_gpio_runtime_resume()
with #ifdef CONFIG_PM.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Fix compilation warning when !CONFIG_PM_SLEEP</title>
<updated>2015-10-16T20:53:40Z</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2015-10-13T14:51:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f487bbf309759153f56bac7d7ba5ee63196ce584'/>
<id>urn:sha1:f487bbf309759153f56bac7d7ba5ee63196ce584</id>
<content type='text'>
We get following warning when CONFIG_PM_SLEEP is not set

  warning: â€˜intel_gpio_irq_initâ€™ defined but not used [-Wunused-function]

Since the function is only called from intel_pinctrl_resume() move it
inside CONFIG_PM_SLEEP guard as well.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: replace trivial implementations of gpio_chip request/free</title>
<updated>2015-10-16T20:20:21Z</updated>
<author>
<name>Jonas Gorski</name>
<email>jogo@openwrt.org</email>
</author>
<published>2015-10-11T15:34:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=98c85d583a5dee70d75faed3eb79851dd0a2e2fe'/>
<id>urn:sha1:98c85d583a5dee70d75faed3eb79851dd0a2e2fe</id>
<content type='text'>
Replace all trivial request/free callbacks that do nothing but call into
pinctrl code with the generic versions.

Signed-off-by: Jonas Gorski &lt;jogo@openwrt.org&gt;
Acked-by: Bjorn Andersson &lt;bjorn.andersson@sonymobile.com&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Eric Anholt &lt;eric@anholt.net&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Acked-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Acked-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Acked-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Acked-by: Lee Jones &lt;lee@kernel.org&gt;
Acked-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>genirq: Remove irq argument from irq flow handlers</title>
<updated>2015-09-16T13:47:51Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2015-09-14T08:42:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bd0b9ac405e1794d72533c3d487aa65b6b955a0c'/>
<id>urn:sha1:bd0b9ac405e1794d72533c3d487aa65b6b955a0c</id>
<content type='text'>
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Cc: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
</content>
</entry>
</feed>
