<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/pinctrl/intel, branch v4.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2016-06-23T09:05:04Z</updated>
<entry>
<title>pinctrl: baytrail: Fix mingled clock pins</title>
<updated>2016-06-23T09:05:04Z</updated>
<author>
<name>Cristina Ciocan</name>
<email>cristina.ciocan@intel.com</email>
</author>
<published>2016-06-22T11:17:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b41aa4f8476545e2b663b1549759a8c3a66f47b0'/>
<id>urn:sha1:b41aa4f8476545e2b663b1549759a8c3a66f47b0</id>
<content type='text'>
Fix plt clock 3, 4 and 5 pins, which were not in the proper order.

Signed-off-by: Cristina Ciocan &lt;cristina.ciocan@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>drivers/pinctrl/intel/pinctrl-baytrail.c: fix build with gcc-4.4</title>
<updated>2016-05-26T22:35:44Z</updated>
<author>
<name>Andrew Morton</name>
<email>akpm@linux-foundation.org</email>
</author>
<published>2016-05-26T22:16:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bbccb9c7bbeb6c78eb467c191c97360160f13704'/>
<id>urn:sha1:bbccb9c7bbeb6c78eb467c191c97360160f13704</id>
<content type='text'>
gcc-4.4 and thereabouts has issues with initializers of anonymous
unions, and it generates the following warnings:

  drivers/pinctrl/intel/pinctrl-baytrail.c:413: error: unknown field 'simple_funcs' specified in initializer
  drivers/pinctrl/intel/pinctrl-baytrail.c:413: warning: missing braces around initializer
  drivers/pinctrl/intel/pinctrl-baytrail.c:413: warning: (near initialization for 'byt_score_groups[0].&lt;anonymous&gt;')
  drivers/pinctrl/intel/pinctrl-baytrail.c:415: error: unknown field 'simple_funcs' specified in initializer
  drivers/pinctrl/intel/pinctrl-baytrail.c:417: error: unknown field 'simple_funcs' specified in initializer
  ...

Work around this.

Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Cc: Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2016-05-19T19:50:56Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-05-19T19:50:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a37571a29eca963562ff5a9233db4a5c73c72cf9'/>
<id>urn:sha1:a37571a29eca963562ff5a9233db4a5c73c72cf9</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This kernel cycle was quite calm when it comes to pin control and
  there is really just one major change, and that is the introduction of
  devm_pinctrl_register() managed resources.

  Apart from that linear development, details below.

  Core changes:

   - Add the devm_pinctrl_register() API and switch all applicable
     drivers to use it, saving lots of lines of code all over the place.

  New drivers:

   - driver for the Broadcom NS2 SoC

   - subdriver for the PXA25x SoCs

   - subdriver for the AMLogic Meson GXBB SoC

  Driver improvements:

   - the Intel Baytrail driver now properly supports pin control

   - Nomadik, Rockchip, Broadcom BCM2835 support the .get_direction()
     callback in the GPIO portions

   - continued development and stabilization of several SH-PFC SoC
     subdrivers: r8a7795, r8a7790, r8a7794 etc"

* tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (85 commits)
  Revert "pinctrl: tegra: avoid parked_reg and parked_bank"
  pinctrl: meson: Fix eth_tx_en bit index
  pinctrl: tegra: avoid parked_reg and parked_bank
  pinctrl: tegra: Correctly check the supported configuration
  pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC
  pinctrl: rockchip: fix pull setting error for rk3399
  pinctrl: stm32: Implement .pin_config_dbg_show()
  pinctrl: nomadik: hide nmk_gpio_get_mode when unused
  pinctrl: ns2: rename pinctrl_utils_dt_free_map
  pinctrl: at91: Merge clk_prepare and clk_enable into clk_prepare_enable
  pinctrl: at91: Make at91_gpio_template const
  pinctrl: baytrail: fix some error handling in debugfs
  pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC
  pinctrl: sirf/atlas7: trivial fix of spelling mistake on flagged
  pinctrl: sh-pfc: Kill unused variable in sh_pfc_remove()
  pinctrl: nomadik: implement .get_direction()
  pinctrl: nomadik: use BIT() with offsets consequently
  pinctrl: exynos5440: Use off-stack memory for pinctrl_gpio_range
  pinctrl: zynq: Use devm_pinctrl_register() for pinctrl registration
  pinctrl: u300: Use devm_pinctrl_register() for pinctrl registration
  ...
</content>
</entry>
<entry>
<title>pinctrl: baytrail: fix some error handling in debugfs</title>
<updated>2016-04-30T11:34:53Z</updated>
<author>
<name>Dan Carpenter</name>
<email>dan.carpenter@oracle.com</email>
</author>
<published>2016-04-27T08:08:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=22bbd21b81189942688db5aafe4a72074f38561b'/>
<id>urn:sha1:22bbd21b81189942688db5aafe4a72074f38561b</id>
<content type='text'>
We need to unlock before continuing.  Also the continue was accidentally
left out on one error path which would lead to a NULL dereference.

Fixes: 86e3ef812fe3 ('pinctrl: baytrail: Update gpio chip operations')
Signed-off-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Use devm_pinctrl_register() for pinctrl registration</title>
<updated>2016-04-20T22:02:28Z</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-02-28T09:12:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=54d46cd7d236540f881767af366eca9734b7e980'/>
<id>urn:sha1:54d46cd7d236540f881767af366eca9734b7e980</id>
<content type='text'>
Use devm_pinctrl_register() for pin control registration and clean
error path.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Cc: Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: cherryview: Use devm_pinctrl_register() for pinctrl registration</title>
<updated>2016-04-20T22:02:24Z</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-02-24T09:14:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7cf061fadd66511074631acbb95e6f00e4fcc047'/>
<id>urn:sha1:7cf061fadd66511074631acbb95e6f00e4fcc047</id>
<content type='text'>
Use devm_pinctrl_register() for pin control registration and clean
error path.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Cc: Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: baytrail: Add debounce configuration</title>
<updated>2016-04-04T14:14:28Z</updated>
<author>
<name>Cristina Ciocan</name>
<email>cristina.ciocan@intel.com</email>
</author>
<published>2016-04-01T11:00:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=658b476c742fe379e7020309fd590a27b457a4c1'/>
<id>urn:sha1:658b476c742fe379e7020309fd590a27b457a4c1</id>
<content type='text'>
Make debounce setting and getting functionality available when
configurating a certain pin.

Signed-off-by: Cristina Ciocan &lt;cristina.ciocan@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: baytrail: Register pin control handling</title>
<updated>2016-04-04T14:12:07Z</updated>
<author>
<name>Cristina Ciocan</name>
<email>cristina.ciocan@intel.com</email>
</author>
<published>2016-04-01T11:00:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=71e6ca61e82667c5c0de4aa779a4438d6568262f'/>
<id>urn:sha1:71e6ca61e82667c5c0de4aa779a4438d6568262f</id>
<content type='text'>
This patch updates device's probing, removal and irq handling in order to
register it as pinctrl device. Pin control data is matched by ACPI UID,
since it is passed along as driver data in acpi_device_id structure.

Signed-off-by: Cristina Ciocan &lt;cristina.ciocan@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: baytrail: Update irq chip operations</title>
<updated>2016-04-04T14:09:40Z</updated>
<author>
<name>Cristina Ciocan</name>
<email>cristina.ciocan@intel.com</email>
</author>
<published>2016-04-01T11:00:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9f573b98ca502ad495641ce42fcc18ccb32f5827'/>
<id>urn:sha1:9f573b98ca502ad495641ce42fcc18ccb32f5827</id>
<content type='text'>
This patch updates the irq chip implementation in order
to interact with the pin control chip model: the chip
contains reference to SOC data and pin/group/community
information is retrieved through the SOC reference.

Signed-off-by: Cristina Ciocan &lt;cristina.ciocan@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: baytrail: Update gpio chip operations</title>
<updated>2016-04-04T14:02:19Z</updated>
<author>
<name>Cristina Ciocan</name>
<email>cristina.ciocan@intel.com</email>
</author>
<published>2016-04-01T11:00:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=86e3ef812fe3df8298c0bee81b0c786006a9c85c'/>
<id>urn:sha1:86e3ef812fe3df8298c0bee81b0c786006a9c85c</id>
<content type='text'>
This patch updates the gpio chip implementation in order
to interact with the pin control model: the chip contains
reference to SOC data and pin/group/community information
is retrieved through the SOC reference.

Signed-off-by: Cristina Ciocan &lt;cristina.ciocan@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
